October 23, 2005 9:00 PM PDT

Start-up plans new energy-efficient processor

P.A. Semi is working on a low-power Power chip.

The Santa Clara, Calif.-based start-up this week is set to unveil its plans for a microprocessor based around the Power architecture--the same architecture behind chips in IBM servers and current Macs--that consumes only a fraction of the energy of existing chips.

The company's first so-called PWRficient chip will feature two processing cores, run at 2GHz and consume on average about 5 watts, thanks to an emphasis on integration and circuit design. At a maximum, it will consume 25 watts, far less than the single-core Power chips that can hit 90 watts found on the market today.

The power savings are even greater when compared with an Intel Xeon or Advanced Micro Devices' Opteron, said P.A. Semi CEO Dan Dobberpuhl. Over three years, a 4,000-node cluster of PWRficient-based servers might consume $360,000 in electricity--an equivalent bank of Xeons and Opterons would chew up $3 million and $3.5 million worth of electricity, respectively, P.A. Semi claims.

"It's like a factor of 10 from today's technology," Dobberpuhl said.

The PWRficient actually won't come out for two years, so it's hard to predict exactly how it will stack up against the competition. Landing customers in the notoriously difficult market won't be easy either. But analysts say the ideas represented in the design are worth watching.

"The chip definitely looks good from a power standpoint," said Linley Gwennap, an analyst at the Linley Group. "But will they be the low-power leader? It is hard to say."

Just as important, the chip has been designed in a way that will make it easy to adapt to a wide variety of devices. Different versions of the PWRficient will contain anywhere from one to eight cores. The chip also can be attached to a broader-than-normal number of input-output devices.

P.A. Semi, in fact, plans to pitch different configurations of the chip to network equipment makers, consumer electronics manufacturers and server makers. The company is expected to publicly showcase its plans at the Fall Processor Forum in San Jose, Calif., this week.

Although new, the people behind the company have played major roles in the industry for decades. While at Digital Equipment Corp., Dobberpuhl oversaw the development of the Alpha chip for servers and the StrongARM processor for handhelds. StrongARM, which was sold to Intel and became the foundation for the XScale family, was one of the first high-performance energy-efficient processors, Dobberpuhl pointed out.

Jim Keller, P.A. Semi's vice president of engineering, and Pete Bannon, vice president of architecture, worked on the Alpha as well. Keller then went to AMD and helped define the architecture for what became the Opteron, while Bannon followed the Alpha through the Digital-Compaq and Compaq-Hewlett Packard mergers before taking a short stint at Intel. (The P.A. Semi name originally stood for Palo Alto Semiconductor, but after the company moved to Santa Clara no one felt like changing the name.)

Cutting consumption
Integration is one of the chief ways power consumption gets cut. PWRficient processors will integrate both the memory controller, the so-called "Northbridge" chip in a chipset, and the Southbridge, a set of chips that lets the processor connect to networking cards and other peripherals, the company said.

Integrating parts cuts down on energy consumption and manufacturing costs (due to fewer chips). Additionally, integrated chips take up less overall real estate than a collection of separate chips, which in turn leads to smaller computers. This allows IT managers to fit more computers into a finite space, a growing concern in the era of clusters.

"Usually you need three to five chips for a complete solution--this is one," Dobberpuhl said.

While many companies integrate the Northbridge, inserting the Southbridge into the same piece of silicon as the processor is somewhat of a novelty. One of the problems has been the plethora of communications standards--PCI, PCI Express, Rapid I/O, XAUI. Some manufacturers want several ports of some of these, and sometimes none of the others.

Until recently, system-on-a-chip vendors had problems making chips because of this issue. Standards for physical connectors, however, have eased this concern.

Another design novelty comes in the cache. In most dual-core chips, the two cores have separate caches, or they connect directly to the same cache. In P.A. Semi's chip, the two cores and the cache, along with the I/O system and a hardware accelerator, connect separately to what the company calls its Conexium cross bar. In other words, all of the subunits speak to each other over a microscopic network.

"In many ways, it looks like a server on a chip," said Kevin Krewell, editor in chief of the Microprocessor Report.

So who wants it? That could be the tough part. Even if it leads in terms of power consumption, hardware manufacturers move slower than a three-toed sloth when it comes to adapting new components. Two other major Power chip manufacturers--IBM and Freescale--already exist, said Krewell. Apple Computer, one of the companies that really needed a low-power Power, is switching to Intel.

Dobberpuhl to some degree agrees. P.A. Semi won't go after server contracts at first. "The datacenter is going to be a tough nut," he said. Still, IBM and Freescale sell most of their chips to network equipment manufacturers like Nokia. Those companies have several different models on the market at any given time, and model turnover occurs somewhat regularly.

And name recognition might help.

"This is an all-star group of designers," Krewell said.

 

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