November 13, 2001 5:20 PM PST

IBM prepares sequel to Summit server

LAS VEGAS--IBM still is months from launching its most important Intel server, based on a chip that enables a 16-processor system, but already Big Blue is contemplating a 32-processor successor as well as plans to license the first model to other companies.

IBM has been working on chipset called Summit and now formally named Enterprise X Architecture that hooks together four of Intel's upcoming Xeon server processors with memory and other subsystems. Summit servers are ready to go and will debut at the same time Intel releases the chip, said Tom Bradicich, director of architecture and technology for IBM's Intel server group.

"This is a good time to be us," said a confident Bradicich during a briefing at the Comdex Fall 2001 trade show.

Intel spokesman Otto Pijpker would only reiterate that Xeon is scheduled to arrive in the first half of 2002, but one source familiar with the schedule said the Xeon for multiprocessor servers will arrive late in the first quarter of 2002.

IBM is eagerly awaiting the launch, Bradicich said, the most important step yet in the company's "X Architecture" plan to use IBM technology to push Intel servers beyond the status of buffed-up PCs. Since the program began in October 1998, IBM has improved memory and the PCI communications subsystem, but Summit represents a major overhaul.

The next generation of the design, called Enterprise X Architecture 2, will enable 32-processor servers, Bradicich said. It's due in 2 1/2 to three years.

There's more than ego on the line. Summit took about $20 million and three years to develop, he said.

One way IBM hopes to recoup that investment is by letting other server makers use the design, Bradicich said, though he didn't reveal which companies are interested.

"We are negotiating licensing this," he said, although IBM will keep much of its own software to differentiate its products from others.

Dell Computer, which doesn't invest as much in server research as rivals Hewlett-Packard, Compaq Computer or IBM, is one contender. Compaq isn't a likely contender, though, because it's working on its own eight-processor Xeon server.

Convincing competitors to use high-end Intel server designs isn't easy: Unisys signed up Compaq and HP to sell its ES7000 CMP system and hoped to spread it farther, but the two companies dumped the design in the end, leaving only Dell to resell the machine.

The drawbacks of Intel servers
IBM is gung-ho on the benefits of tapping into the Intel server market, which brings with it lower component costs and a large collection of software.

But the X Architecture effort also has revealed the perils of the approach: IBM can't control all aspects of the designs. Big Blue thus is beholden to Intel and Microsoft, two companies whose products are slowly penetrating into higher-end jobs typically run by Unix servers and mainframes.

For example, the Summit chipset originally was designed to work with Intel's 64-bit Itanium processor family, Bradicich said. But Itanium chips are arriving years behind schedule, and IBM was able to update Summit for 32-bit chips by swapping out a supporting chip that handles communication with the processor.

Even the 32-bit chip plans have had some lumps. Intel released a two-processor Xeon chip for workstations, the first chip based on the newer Pentium 4 CPU, but decided not to sell it for server use, instead waiting for a faster successor called "Prestonia." For multiprocessor machines, though, the earlier-generation "Foster" models of Xeon will be used, with a successor called "Gallatin" scheduled to arrive in late 2002.

Microsoft also can be a bottleneck.

Currently, Windows 2000 DataCenter, Microsoft's top-end operating system, is billed to work on 32-processor servers, but Bradicich said 16-processor models are realistically as big as most customers will go, in particular because higher-level software such as database programs must be carefully written to take advantage of multiprocessor systems.

IBM can do only so much to improve the operating system, even with a joint development center near Microsoft. For example, IBM is working with Microsoft to take better advantage of a Summit feature that allows a system to be divided into several independent "partitions," a feature more frequently found in high-end Unix servers.

Currently, the machine must be shut down before any partition changes can take effect, Bradicich said, a major step short of the dynamic partitioning of Unix servers. There's always Linux, though, over which Big Blue can exert a little more control.

"We're looking at that technology for Linux," Bradicich said of dynamic partitioning.

Summit details
IBM first began talking about Summit in July 2000. It then revealed that the system is made of four four-processor blocks connected with a high-speed "scalability port."

A year ago, IBM said Summit will work with both Intel's prevailing 32-bit CPU designs and its radically different 64-bit Itanium processor family brethren, beginning with its second-generation model code-named "McKinley."

Now more details are emerging. In addition to the partitioning capability, IBM said Summit comes with as much as 64MB of high-speed cache memory shared by each four-processor unit. This immense cache has very low delays, Bradicich said.

And Summit can keep track of what information is stored in the cache, so processors can find it more quickly or know when to retrieve it from slower main memory.

Each four-processor system will house 8GB to 16GB of memory.

The system also comes with memory-mirroring technology that lets one bank of memory step in if one fails. And with "bit steering," memory modules with less drastic failures can take advantage of unused memory communication channels.

Defective memory can be replaced or new memory added without shutting the system down, Bradicich added.

The system comes with six high-speed PCI-X communication channels and a remote input/output cable that can link a server to another drawer full of as many as 24 PCI-X slots.

Summit will be built by IBM Microelectronics using advanced copper and silicon-on-insulator chipmaking technologies, Bradicich said. By the time the system ships, the chipset will likely be built using 130-nanometer (0.13 micron) features.

 

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