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CEO Paul Otellini held up a silicon wafer with the prototype chips before several thousand attendees at the Intel Developer Forum here Tuesday. The chips are capable of exchanging data at a terabyte a second, Otellini said during a keynote speech. The company hopes to have these chips ready for commercial production within a five-year window.
Intel uses its twice-yearly conference to educate developers on its long- and short-term plans. Over three days, hardware developers and partners get a chance to interact with Intel employees and take classes on new technologies.
As expected, Intel announced plans to have quad-core processors ready for its customers in November. An extremely fast Core 2 Extreme processor with four cores will be released then, and the newly named Core 2 Quad processor for mainstream desktops will follow in the first quarter of next year, Otellini said.
The quad-core server processors are on a similar trajectory, with a faster Xeon 5300 processor scheduled for November and a low-power Xeon slated for the first quarter. Intel's first quad-core processors are actually two of its dual-core Core architecture chips combined into a multichip package.
"Performance matters again," Otellini said, disclosing that the quad-core desktop processor will deliver 70 percent faster integer performance than the Core 2 Duo, and the quad-core server processor will be 50 percent faster than the Xeon 5100 introduced in June.
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Video: Intel's Otellini: Terabyte per second
The future of processors as Intel sees it
One reason performance didn't matter to Intel during the last couple of years was because it was getting trounced on benchmarks at the hands of Advanced Micro Devices' Opteron and Athlon 64 server and desktop processors. That all changed with the introduction of the Core 2 Duo chips this year.
"With this new set of dual and quad-core processors, we've regained our leadership," Otellini told developers. The growing Internet video phenomenon, as evidenced by the spectacular rise of Web sites like YouTube, will keep these processors busy during intensive tasks like video editing, he said.
Road to Santa Rosa
Notebooks will get a face-lift next year with the Santa Rosa platform, which will provide notebooks with new technologies like 802.11n wireless and flash memory. Intel believes that it will be the first to add flash memory to a notebook motherboard, which will improve boot times and reduce power consumption, Otellini said.
System power consumption is only one part of the equation. During the next few years, Intel wants to improve the performance per watt of power consumption of its transistors by 300 percent through new manufacturing technologies and designs, Otellini said. The next step on that road, Intel's 45-nanometer manufacturing technology, will enable the company to build chips that deliver a 20 percent improvement in performance with five times less current leakage, he said.
But the ultimate goal, as envisioned by Intel's terascale research prototype, is to enable a trillion floating-point operations per second--a teraflop--on a single chip. Ten years ago, the ASCI Red supercomputer at Sandia National Laboratories became the first supercomputer to deliver 1 teraflop using 4,510 computing nodes.
Intel's prototype uses 80 floating-point cores, each running at 3.16GHz, Justin Rattner, Intel's chief technology officer, said in a speech following Otellini's address. In order to move data in between individual cores and into memory, the company plans to use an on-chip interconnect fabric and stacked SRAM (static RAM) chips attached directly to the bottom of the chip, he said.
Intel's work on silicon photonics, including its recent announcement of a silicon laser, could help contribute toward the core-to-core connection challenge. Rattner and professor John Bowers of the University of California at Santa Barbara demonstrated Intel's newest breakthrough model of silicon laser, which was constructed using conventional techniques that are better suited to volume manufacturing than older iterations of the laser.
Many of the architectural nuances of the 80-core chip can be traced back to earlier research breakthroughs announced at previous IDFs. Connecting chips directly to each other through tiny wires is called Through Silicon Vias, which Intel discussed in 2005. TSV will give the chip an aggregate memory bandwidth of 1 terabyte per second.
Intel, meanwhile, began to discuss replacing wires with optical technology in computers and chips in 2001 and has come out with several experimental parts for enabling lasers and optical technology to replace wires.
The same year, Intel began to warn about the dangers of heat dissipation in processors. One of the solutions, the company said at the time, lay in producing chips with multiple cores.
CNET News.com's Michael Kanellos contributed to this report.
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Paul Otellini, teraflop, quad-core, Intel Xeon, power consumption
technology, but because someone does. If this was not true, I
doubt that billions upon billions of dollars would be spent
working on it.
Complex calculations for scientific research, video production,
or even computer games need the horsepower and the
technology trickles down to you and me whether we need it or
not. No one will force you to buy another computer, but you may
not even be able to run your OS as it continues to evolve and
expand over time.
Have a nice day!
People wondered why I bought a 386/33 system with 16mb of ram once back in the day when 2-4mb was considered good.
And just for the wags jumping on MS, I noted a while back that current versions of Linux really, really stink when run on older systems too. It's not just MS making things that require more and faster hardware.
However, I do think that before we get to 80 core systems we'll find a point where people don't feel a need to upgrade any more but who knows, I don't.
and intel are just preparing themselves for the high demand!
Fascinating.
I can't wait to see the first super computer built using these chips. :)
I will LOVE 80 cores!
Why on earth would Dell, Lenovo, IBM, and HP escape to AMD if their technology or roadmap were busted.
I figure if you cannot address the issues then just pull out a laser beam or an 80 core CPU. Bravo Intel.
Intels stock is up AMD's is down right now.
IBM, Dell and HP went with AMD finally for three reasons. In this order they had a, at the time, a better product, as good or better pricing and they wanted the PR of going with the underdog....to make fangirls like you happy.
Intel has let go of alot of fat, sold off non profitable groups and now has a better product, speed, power and heat wise.
Lets see what happens in a year. It is going to all come down to a price war...which can win if they want to.
You can't even compare each core of the Cell to an existing Intel X86 chip on the market today. The Cell cores each do more work, and include more functionality than what is included in the X86 class chips. So the Cell isn't perfect for any one job, but it meets the needs of many hundreds of jobs in one chip design. This significantly reduces development costs for those companies using the Cell processor in their hardware.
The 80 core Intel demonstration chip is an entirely different effort all-together and is still 5 years from production.
Regarding cores & efficiency, sure, getting more cores to add speed efficiently by co-operating is hard. To do efficiently, that is. You get diminishing returns by adding cores without being clever. That still doesn't discount the brute force approach! Throw 1000s of cores at it, it will be faster even if half of them are slacking or crashed/looping half the time.
2) with power savings comes thermal management.
3) reliability. If 1 or more cores fail, just ignore them. You only lose 1.25% of your performance per core. If you can "map out" bad cores (similar to how you would shut them down for power & heat savings) you could loose 5-10 cores before you even noticed the performance hit.
4) for things like laptops, you could dynamically redistrubute core loading to avoid local hot spots and run with less overall cooling.
5) certain operations (rendering, raytracing, FEA, CFD) would benefit hugely from multiple small cores over 1-4 monolithic cores.
sad that they don't have to make nails one at a time any more?
Progress marches on.
Have a nice day!
C|Net has focused on the memory per core as the big issue. They are right to be impressed by it, but they fail to see the big picture as to why this memory is there. Each core is expected to perform dozens, hundreds or thousands of operations on that set of data. Some of these operations may be to make that data available to instructions being performed by another core. Splitting the data is part of the design change and software will need to know where it sends data in a multi-core chip and where it's instructions are being run to optimize data access.
Some people complain that 20GB of RAM might not be enough. They say that the system will allow more RAM because that makes sense. No it won't! You will not want to pool all of your system RAM into one place accessed by any of these 80 cores. It is a performance hit to multi-core systems to share that RAM. Some of this will be seen with one CPU performing an operation on data held by RAM attached to another CPU. In this case only two CPUs are held up instead of all 80. Loading data from outside the CPU to have a core perform operations on will slow this system down in the same way that a page file hit slows a current Windows system. It's the difference in 2 vs. 80 operations.
Software that runs on Tera-Scale processors would know how to split tasks and memory between cores. The Operating System will need to understand to give a set of cores to an application so it has enough RAM and processing power to get it's jobs done. You could see 20 cores doing the same operation on sets of data (SIMD). Then at the same time 10 cores doing a different set of instructions on a shared set of data. Each core can reach the RAM on another core, so those 10 would be able to read, write, and perform an operation on that RAM.
This chip combines some SIMD concepts along with parallel computing concepts and the new multi-core concepts. Intel discovered you really need a lot of RAM per core so each core can handle a lot of data by itself and the entire RAM needs of the applications will be met within the CPU. 20GB is what they show in a sample using SRAM. They will be switching to DRAM and with that switch may also increase the RAM per core. The key to RAM per Core is going to depend on some efficiencies in the CPU based on tasks and data. Intel will begin to discover their performance curve with this prototype.
This system is nothing near what you will see on your desk in 5 years. It will be used to pave the way for application development and system design for years to come. It is the most important stepping stone for the future of computing that we've seen in the last several years because it changes how the hardware and software are designed to work together.
user requests via hardware load-balancer, a cluster of 12-cpu DB
machines, and one DB machine with 48 cpus (w/96 GB). Managing
that many machines is a hassle (and that's small compared with
Google, from what I hear). If we could divide by 80 it would be
great. The one downside being that you do have a lot of eggs in
each basket -- one machine down cuts out a lot of capacity.
A 3.33 GHz Core 2 CPU comsumes about 75-80 W but can reach over 130W when put under heavy load. The 80 core chip is supposed to operate at 3.19 Gz.
So lets say that each core consumes 37.5 W at 3.2 GHz. Intel has also annuonced a new 35nm technology that will yield a 310% increase in performance per watt. So dividing 37.5 by 3.1 will yield what a core based an that enhanced technology will consume: 12.5W. If we multiply that by 80 which is the amount of cores on the chip we will get a power consumption of about 1000W. And that is not enough, they are also going to sandwich stacked SRAM with a performance of Terabytes/second attached directly to the bottom of the chip which also consumes a tremendous amount of power. I would like to see an answer on how they are going to deal with all this heat of over 1000W coming from that little chip before I'll take this statement seriously. We're talking about heat that is comparable to the face of the sun!
The reason of my doubt is the power compsumption of the new 80 core chip.
A 3.33 GHz Core 2 CPU comsumes about 75-80 W but can reach over 130W when put under heavy load. The 80 core chip is supposed to operate at 3.19 GHz.
So lets say that each core consumes 37.5 W at 3.2 GHz. Intel has also annuonced a new 35nm technology that will yield a 310% increase in performance per watt. So dividing 37.5 by 3.1 will yield what a core based an that enhanced technology will consume: 12.5W. If we multiply that by 80 which is the amount of cores on the chip we will get a power consumption of about 1000W. And that is not enough, they are also going to sandwich stacked SRAM with a performance of Terabytes/second attached directly to the bottom of the chip which also consumes a tremendous amount of power. I would like to see an answer on how they are going to deal with all this heat of over 1000W coming from that little chip before I'll take their statements about this chip seriously. We're talking about heat that is comparable to the face of the sun!
Umm, have you seen the Ultra High Definition media that the japanese will be using for TV by 2015? That stuff makes 35mm film look fuzzy. And that runs to rather supercomputing type terascale storage and processing requirements.
Somebody will have to make those programs, and also design those much more detailed sets, costumes and doubtless CGI special effects.
Yes bring on my petaflops of processing, and Ultra High Def manga streaming to my OLED wall. Bring that right along over here.
You can Keep your Win 98, MS Word, and BBC basic for your grey little tank top world thankyou.
The iphone already has the capacity to be the library of alexandria in your pocket.
You see where this is going? MS Word up yo yo.
- by Inurdaes March 14, 2009 3:47 AM PDT
- I can has suparcomputar nao? :D
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