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March 18, 2008 6:10 PM PDT

Intel future graphics target ATI, Nvidia

by Brooke Crothers
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During a February earnings conference call, Jen-Hsun Huang, president and CEO of Nvidia, repeated one thing over and over: graphics are in and the central processor is out. There is some truth to this. And Intel's plans for future silicon technology address this head on.

Pat Gelsinger, general manager of the digital enterprise group at Intel, spelled out Intel's strategies for future graphics technology on Monday. He addressed the higher-octane technology that will be built into future "Nehalem" processors and the highly sophisticated "Larrabee" chips that will be offered as "discrete" or standalone products.

First, some perspective. Intel--not Nvidia or ATI--is the world's largest supplier of graphics chips for PCs. The reason is simple. Intel-integrated graphics silicon is shipped in tens of millions of PCs every year. It's a low-cost--and relatively low-performance--solution that many PC vendors opt for. But that doesn't mean Intel is the premier supplier of sophisticated mainstream PC graphics technology. That distinction goes to Nvidia and ATI. Intel is a non-player. This is evidenced by the proliferation of Nvidia- and ATI-based graphics board reviews at enthusiast Web sites and the bigger role that graphics processors from these two companies play in handling increasingly complex visual applications.

And, as the Nvidia CEO has intimated, unless Intel responds aggressively, this could make Nvidia a direct Intel competitor in the future. Nvidia's newest GeForce 9600 GT GPU rivals, at the very least, Intel chips in complexity. It has 64 stream processors--each individually clocked at 1625MHz--and a 256-bit memory interface running at 900MHz and contains more than 500 million transistors.

NvidiaGeForce 9600 GT boards: each Nvidia chip has over 500 million transistors.

NvidiaGeForce 9600 GT boards: each Nvidia chip has over 500 million transistors.

(Credit: Nvidia)

To address this, Intel intends to boost integrated graphics performance in Nehalem processors and, for the first time, offer a discrete (standalone) graphics product for high-end markets. Both Nehalem and Larrabee are targeted at the 2009-2010 time frame.

So, how will Intel improve Nehalem integrated graphics? Not surprisingly, more transistors and more bandwidth, according to Gelsinger. "Largely, integrated graphics is as much die area as you can throw at it and as much memory bandwidth as you can give it," Gelsinger said. "So, could we equal discrete graphics performance with integrated graphics? Of course." Gelsinger went on to say that Intel will focus on "more transistor budget, leading-edge process technology, and more memory bandwidth dedicated to integrated graphics."

Logistically, this will be accomplished by turning today's three-chip CPU into a two-chip CPU, he said. That means moving the graphics silicon onto the same die with the main processor. More specifically, the part of the chipset referred to as the "north bridge" is going away. The north bridge contains the memory controller and graphics controller. Both of these components will be moved onto the CPU die. The other part of the chipset referred to as the "south bridge" will remain separate. This includes I/O related components.

But Gelsinger said there are definite limits to what can be done with integrated graphics because of the big power and transistor requirements for high-end discrete (standalone) graphics products. They have "a very different price point and die envelope and power envelope. Some of the (discrete) graphics chips alone are 150 watts. We build whole platforms for less (power) than that," he said.

This is where Larrabee comes in. Gelsinger said that Larrabee--a "many core" chip--will target Nvidia and AMD/ATI's discrete graphics. "Obviously, if we're going to be competing in the discrete graphics marketplace, we think we're going to have to compete well...in terms of traditional benchmarks like 3D Mark," he said, adding that Intel will support traditional graphics interfaces such as DirectX and OpenGL. A big potential plus: since Larrabee cores will be based on the Intel Architecture, developers who already write code for standard Intel microprocessors can develop for Larrabee without learning a completely new architecture.

Originally posted at Nanotech - The Circuits Blog
Brooke Crothers is a former editor at large at CNET News.com, and has been an editor for the Asian weekly version of the Wall Street Journal. He writes for the CNET Blog Network, and is not a current employee of CNET. Contact him at mbcrothers@gmail.com. Disclosure.
September 18, 2007 5:31 PM PDT

Intel to build flash drives into servers

by Stephen Shankland
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SAN FRANCISCO--Intel will begin building flash-memory drives into servers in 2008, starting with 32GB models that the company promises will boost system performance.

Flash drives can perform 10 to 50 times as many input-output transactions per second as conventional magnetic hard drives, said Pat Gelsinger, general manager of Intel's Digital Enterprise Group, in a speech at Intel Developer Forum here. In addition, they consume 4.5 times less power and write data at twice the speed.

Of course, the flash-drive capacities are much smaller. "The cost per bit is clearly going to be higher," Gelsinger said in a meeting with reporters. But some customers are bound much more by performance, he said, often running lots of hard drives in parallel but filling them only to 10 or 20 percent capacity.

Intel will offer samples of the technology this year and sell production models in 2008, Gelsinger added in an interview.

Intel will start with 32GB models, using NAND flash memory. "We'll have nice progression as we go to 64GB and 128GB over time," he said.

September 18, 2007 4:11 PM PDT

Intel breathless with Nehalem anticipation

by Stephen Shankland
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SAN FRANCISCO--This Nehalem plan better work out for Intel, because the chipmaker set very high expectations for the next-generation processor design Tuesday.

Pat Gelsinger, general manager of Intel's Digital Enterprise Group, speaks at Intel Developer Forum in San Francisco.

(Credit: Stephen Shankland/CNET Networks)

Pat Gelsinger, general manager of Intel's Digital Enterprise Group, demonstrated a Nehalem-based system at the Intel Developer Forum here that he said will bring major performance improvements for the company's x86 processor line. The processor family itself is due to arrive in 2008.

The Nehalem demonstration featured a system with two quad-core processors; each processing core can handle two independent instruction sequences called threads, and the demo showed all 16 threads at work on various tasks. The processor was the very first incarnation of Nehalem--the "A0" version--built for the first time three weeks ago, Gelsinger said.

"What you saw today was incredible health," he boasted during a meeting with reporters after the speech. "It really is pretty spectacular, and we're excited by the progress."

Nehalem brings major changes not just to the processor but also to the way in which it communicates with memory and other processors, a technology formerly called CSI, which variously stood for Common System Interconnect or Interface, and now branded as QuickPath Interconnect, or QPI. QuickPath reproduces a technique that rival Advanced Micro Devices used for years to market share against Intel and secure a solid position in all four major server makers' product lines.

The Nehalem processors demonstrated Tuesday each had four cores on a single slice of silicon, the approach AMD uses with its new Barcelona member of the Opteron processor family. In 2009, Intel will sell Nehalem processors with eight cores on a single slice of silicon.

Intel also is expected to sell less expensive Nehalem processors with dual cores per die, a source familiar with the company's plans said.

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