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May 12, 2009 2:40 PM PDT

Intel CEO spells out Atom, small-device push

by Brooke Crothers
  • 7 comments

At Intel's investor meeting Tuesday, CEO Paul Otellini discussed how the company is moving to system-on-chip technology in a big way.

Otellini began by saying that the market outlook remains positive. "A little better than we expected. So far, so good." He said he was "more firm in my belief that we will see seasonality in the second half," alluding to Intel's expectation that the PC market should pick up in the second half of the year. Otellini added that Gartner's forecast of a PC sales decline between 9 and 10 percent in 2009 may be too pessimistic.

Intel CEO Paul Otellini answers a question during the Intel investor meeting Tuesday

Intel CEO Paul Otellini answers a question during the Intel investor meeting Tuesday

System-on-chip (SOC) opportunities will be driven by Intel's upcoming 32-nanometer technology. "All that you're doing is reducing (a computer) system to a single chip," he said. Market segments that will benefit from this technology are Netbooks, smartphones, and embedded devices, he said, adding that Netbooks and smartphones each represent a $10 billion market opportunity by 2011.

Otellini talked up Intel's new relationship with Taiwan Semiconductor Manufacturing Co., which involves "deep collaboration" on the Atom SOC chips used in smartphones. It means, he said, "taking Atom and porting it over to the TSMC process, to help further Intel architecture into those new markets."

Traditional PC markets will give way to "targeted micro-segments" such as the high-end desktop gaming segment, exemplified by PCs from Voodoo and Alienware, Otellini said. "The old big, beige, boring desktop is dead." Intel's upcoming Larrabee graphics chip will address this market, in addition to standard multicore processors.

The consumer desktop market will be transitioning to iMac-style all-in-one systems, Otellini said. There will be Atom-based "Nettops," small entry-level computers priced at a couple hundred dollars, he said. The desktop market will see "small growth" as people incrementally replace the 800 million units in use.

Otellini said Intel will mix and match technology across different product segments very quickly now--the number of cores and the type of graphics, for example, will be quickly rejiggered across different product categories.

Intel views its fab (factory) strategy as extremely important. Otellini said that Intel is one of the few companies that has committed to a next-generation 22-nanometer manufacturing process. "Intel was able to create a market for Netbooks faster than the (Nintendo) Wii and iPhone...Only Intel has the (manufacturing) scale to do this," he said.

February 10, 2009 1:00 PM PST

Intel moves up rollout of new chips

by Brooke Crothers
  • 9 comments

Despite being slammed by the financial crisis, Intel is not slowing down. It made this crystal clear in a chip technology briefing on Tuesday, putting rivals on notice that the competition will only get more intense.

The world's largest chipmaker is accelerating introduction of new chips, particularly silicon targeted at laptop computers. Intel is achieving this by moving quickly to processors based on next-generation 32-nanometer manufacturing process technology and investing heavily to keep its most advanced chip factories humming, as CEO Paul Otellini pointed out in a speech in Washington, D.C., earlier today.

In a nutshell, this means Intel may move further ahead of the competition as it uses its deep pockets to advance to the newest generation of processors sooner. It also means a renewed emphasis on packing more features--such as better graphics--into mobile chips, particularly those going into laptops.

Intel is moving graphics into the same package as the processor.

Intel is moving graphics into the same package as the processor.

(Credit: Intel)

"The trend toward notebooks is one of the most important megatrends," said Stephen Smith, vice president and director of business operations for Intel's Digital Enterprise Group. Smith spoke Tuesday in San Francisco during the chip road map briefing, which was also available via teleconference.

Intel will bring out a 32-nanometer mobile processor code-named Arrandale in the fourth quarter of this year that integrates graphics silicon into the same chip package as the main processor or CPU. This is a first for Intel--which to date had offered graphics in a separate chip package. This 32-nanometer dual-core chip was previously expected to appear in 2010.

Another mobile chip due this year, code-named Clarksfield, will pack four cores. This will use current 45-nanometer technology.

Intel roadmap

Intel road map

(Credit: Intel)

Both chips will be based on Intel's new Nehalem microarchitecture, currently used in Core i7 desktop processors.

Smith also reiterated another important technological thrust at Intel when speaking about these upcoming chips: de-emphasizing raw chip speed--usually stated in megahertz or gigahertz--and focusing on "hyper-threading"--or designing chips to handle more than one task at a time without adding more physical processing cores. A thread constitutes a task.

"Clock speeds will stay about the same (as current chips)," Smith said.

Smith also spoke about Westmere, which is Intel's broader term for the effort to move current Nehalem processors (currently marketed as the Core i7) to 32-nanometer technology.

On the server front, an announcement is "imminent" of its first Nehalem processors for servers code-named Nehalem EP, according to Smith. These quad-core processors are designed for servers that have two "sockets"--providing a total of eight processing cores per server.

February 4, 2009 8:40 PM PST

Intel at chip conference: More wireless, less GHz

by Brooke Crothers
  • 1 comment

At the International Solid-State Circuits Conference, Intel will present 15 papers, with a renewed emphasis on integrating more functions into one chip--and less focus on gigahertz. Intel is especially focusing on squeezing more sophisticated wireless silicon into small devices.

"The trend of using smaller transistors to build larger microprocessor cores with higher operating frequency is coming to an end," Mark Bohr, an Intel senior fellow, said Wednesday.

The chipmaker will highlight research on what it is proclaiming as the "new system-on-a-chip (SoC) era," which it describes as requiring "a fundamental shift in the way semiconductor manufacturers will innovate to keep Moore's Law alive." An SoC typically integrates a number of separate functions onto one piece of silicon or into one chip package.

As part of the focus on SoC, Intel is riveting its gaze on the integration of radio silicon, as mobile computers--handhelds, Netbooks, and laptops--become increasingly oriented around connectivity. Future SoCs will have "flexible" radios included on-chip that handle Wi-Fi, WiMAX, 3G, Bluetooth and other widely used standards, according to Intel.

Intel is focusing on getting a variety of wireless technologies onto a system-on-a-chip

Intel is focusing on getting a variety of wireless technologies onto a system-on-a-chip

(Credit: Intel)

"The key research challenge Intel is looking at is how to resolve the inherent problems with a growing number of network technologies--WiMax, Bluetooth, Wi-Fi, etc.--that are landing on platforms and in computers," Intel said Wednesday. "How can you support multiple standards in small form factor devices when you have limited space not only for the radio, but also for the antennas."

Intel spelled out some of the key radio requirements:

  • Should fit in a variety of form factors from laptops to mobile Internet devices (MIDs) to cell phones
  • Increased levels of integration needed
  • Convert more analog to digital to take advantage of Moore's law (45 nanometer, 32nm and beyond)
  • Users can get 200Mb/s today will want 5Gb/s very soon
  • Future radios will need to automatically switch from one network to another with no negative impact to the user

Intel will also discuss optical interconnects for chip-to-chip communications. "The idea of photonics (which is still very much a research idea) is to use optical interconnects to provide the high bandwidth that will be required for some chip-to-chip communications in the future," an Intel spokeperson said Wednesday. This would be an example of another component that could appear in a future SOC, according to Intel.

Intel will also present a paper on a temperature sensor for processors. "Numerous remote sensors are used to measure temperature over the entire multi-core die," Intel said in a statement. "The processor control unit can then work with these sensors and provide accurate temperature information to higher level software components for various housekeeping and optimization tasks."

This will allow better microprocessor performance reliably, with multiple location hot spot temperature measurements and extend the life of processor components by maintaining lower operational stress, Intel said.

On the graphics silicon front, Intel will talk about research into mobile graphics based on SIMD, in which a Single Instruction is applied to Multiple Data elements (such as all the pixels in an image). "With devices becoming smaller and applications becoming more visual, better techniques are needed to do more SIMD processing while using less energy," Intel said in a statement. "Today's SIMD acceleration circuits have high leakage currents and limited power management, and do not scale well to reduced voltages."

For the time being, Intel is not talking about graphics silicon for specific processors. "We are not talking about any specific processor or chip. This is a research effort that would eventually be a component which does the parallel processing within an SOC, CPU or GPU," an Intel spokesperson said Wednesday. (CPU stands for Central Processing Unit; GPU stands for Graphics Processing Unit.)

"This paper is talking about an achievement which would specifically target small devices (i.e. laptops)," the spokesperson said. "We can do SIMD MMX on desktop today, but this research is bringing the technology to small devices." (MMX is a type of SIMD instruction.)

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About Nanotech - The Circuits Blog

Brooke Crothers has served as an editor at large at CNET News, an editor at Dow Jones' Asian Wall Street Journal Weekly, and a senior editor at InfoWorld. His CNET blog covers chip technology and computer systems, and how they define the computing experience. He also contributes to The New York Times' Bits and Technology sections. He is a member of the CNET Blog Network and is not an employee of CNET. Disclosure.

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