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November 16, 2009 1:35 PM PST

Intel unveils supercomputer chip, NEC partnership

by Brooke Crothers
  • 8 comments

Intel on Monday disclosed a version of its Xeon processor line optimized for supercomputers and announced a partnership with NEC to develop future supercomputers.

At Supercomputing 2009 in Portland, Ore., Intel unveiled a future version of its "Nehalem-EX" processor optimized for supercomputers. The six-core chip will run at higher speeds than eight-core versions of the Nehalem-EX processors and will offer advantages for supercomputer specific tasks, Intel said in a statement. Intel also refers to supercomputing as high-performance computing, or HPC.

The chip architecture will offer greater memory speeds and capacity and will allow customers to build single computers or "nodes" with up to 256 such processors, according to Intel. This will be available next year, Intel said.

Intel said Monday that four out of every five supercomputers on the Top500 list published Monday are powered by Intel processors.

Intel also announced that it is partnering with Japan's NEC--that country's largest supercomputer vendor--to jointly develop technologies "that will push the boundaries of supercomputing performance," according to a joint statement.

NEC will use the technologies in future supercomputers based on the Intel Xeon processor and other technologies such as AVX (Advanced Vector Extensions), an extension to Intel's x86 instruction set architecture.

AVX will be used with Intel's upcoming Sandy Bridge microarchitecture due in 2011, according to Intel.

"With NEC further innovating on Intel Xeon processor-based systems, Intel is poised to bring Intel Xeon processor performance to an even wider supercomputing audience, " said Richard Dracott, general manager of Intel's High Performance Computing Group, in a statement.

Fumihiko Hisamitsu, general manager of HPC Division at NEC, said: "NEC's substantial experience in the development of vector processing systems...is a natural fit for taking Intel architecture further into new markets."

A vector processor design can perform operations on multiple data elements simultaneously. Intel Xeon chips are good at scalar processing, which handles one data item at a time.

The initial focus of the collaboration will be the development of technology to boost the memory speed and scalability--the latter refers to expanding a system to increase performance or capacity. "Such enhancements are intended to benefit systems targeting not only the very high end of the scientific computing market segment, but also to benefit smaller HPC installations," the two companies said.

NEC will also continue to sell its existing SX vector processor-based products. NEC, for example, currently markets the SX-9 supercomputer.

September 9, 2009 3:00 PM PDT

Report: Asian firms eye alternative chips

by Brooke Crothers
  • 9 comments

Updated on September 16 at 6:30 a.m. PDT: adding information from Hironori Kasahara, a professor of computer science at Waseda University

Large electronics companies are building a chip for consumer electronics devices in Japan, while a China-based device manufacturer said it is working on devices using the ARM chip design, according to reports.

Waseda University's Hironori Kasahara wrote software for chips that Japanese companies are developing

Waseda University's Hironori Kasahara wrote software for chips that Japanese companies are developing.

(Credit: Waseda Daigaku)

In Japan, some of the country's largest electronics and chip manufacturers are collaborating in an effort to develop a new low-power processor design for consumer electronics devices, according to Nikkei, which Forbes reported earlier.

The Japan-based group includes Fujitsu, Toshiba, Panasonic Renesas Technology, NEC, Hitachi, and Canon. The Ministry of Economy, Trade and Industry will offer between 3 billion and 4 billion yen (between $32 million and $43 million) to support the project, according to Nikkei.

Each company will develop their own central processing unit, or CPU. The report claimed that the chips would be compatible with "energy-saving" software developed by Hironori Kasahara, a professor of computer science at Waseda University, Nikkei said. Kasahara said he was developing an application programming interface (API) for multi-core processors, in response to an e-mail query.

A prototype is able to operate using less than 30 percent of normal power consumption and works even when a power outlet is not available, according to Nikkei.

Once a standard is established--the companies are targeting 2012--the CPU will be used in TVs, digital cameras, and other products. The companies may also sell the chip to other companies for use in automobiles, servers, and robots, Nikkei said.

That doesn't mean, however, the CPU will be adopted across Asia. Following the Nikkei article, Taipei-based Digitimes reported that circuit board makers in Taiwan are not enthusiastic about the prospects of a new CPU architecture.

A more immediate threat to Intel--and possibly a more potent rival to any chip that emerges from the Japan-based chip consortium--is ARM, the power-stingy processor design already used by a host of chip manufacturers including Samsung, Texas Instruments, and Qualcomm.

Hon Hai--also referred to as Foxconn--the world's largest contract electronics manufacturer, is readying small laptop designs based on the ARM processor, according to various reports.

A special assistant to the Hon Hai CEO was quoted by Reuters as saying that the company has "a few smartbook projects" based on the ARM chip. Smartbooks are essentially a smartphone in a larger format, such as a small laptop or tablet. These designs are being promoted by Qualcomm, Nvidia, and Freescale, among other chip manufacturers.

Intel is developing a new version of the Atom processor, a so-called system-on-chip, or SOC, that is slated for use in smartphones as well as consumer electronics products. The smartphone and consumer electronics segments are already highly competitive, unlike the PC market, which is dominated by Intel.

November 5, 2008 1:28 PM PST

Speedy USB 3.0 spec to be unveiled

by Brooke Crothers
  • 34 comments

The next-generation USB specification is slated to be introduced later this month.

USB 3.0 SuperSpeed logo as shown at WinHEC 2008

USB 3.0 SuperSpeed logo as shown at WinHEC 2008

(Credit: Brooke Crothers)

On November 17 the SuperSpeed USB (USB 3.0) Developers Conference, hosted by the USB Implementers Forum in San Jose, Calif., will unveil the USB 3.0 specification to the industry, according to a statement Wednesday from the Implementers Forum.

The USB 3.0 specification, a next-generation high-speed connection standard due in 2009, is significant because all future PCs and devices will use connectors based on it. The spec is also expected to offer 10 times the speed of USB 2.0--used in virtually all PCs introduced in the last few years--or roughly 5 gigabits per second.

Hewlett-Packard, Intel, NEC, NXP Semiconductors, Microsoft, and Texas Instruments are all backers of SuperSpeed USB.

Speaking at the Windows Hardware Engineering Conference (WinHEC) in Los Angeles, USB-IF President Jeff Ravencraft said he expects the final specifications to be made public on November 17.

Intel and Nvidia had been skirmishing over the standard but resolved their differences.

September 11, 2008 12:35 PM PDT

NEC joins IBM on 32-nanometer chip research

by Brooke Crothers
  • 1 comment

IBM has added NEC to its growing list of allied companies doing research on next-generation chip manufacturing technology.

On Thursday, IBM and NEC Electronics signed an agreement for joint development of next-generation semiconductor manufacturing process technology, which includes participation in an IBM-led effort focused on 32-nanometer chips and, later, 22-nanometer chips. Currently, companies like Intel and Advanced Micro Devices are bringing 45-nanometer chips to market.

Generally, as geometries get smaller, chips get faster and more power-efficient.

IBM has accumulated a large, eclectic group of chipmakers at its semiconductor fabrication facility in East Fishkill, N.Y., and the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, State University of New York.

The area is becoming a hub for chip research that, in essence, is trying to counter the huge multibillion dollar R&D budget of chip giant Intel. Not coincidentally, this isn't far from Advanced Micro Devices' proposed $3 billion chip facility in Malta, NY. AMD also does joint R&D with IBM.

Other members are Singapore-based Chartered Semiconductor Manufacturing, Freescale (formerly part of Motorola), Infineon Technologies, Samsung, STMicroelectronics, and Toshiba.

NEC currently co-develops 45nm and 32nm CMOS process technology with Toshiba and is now extending that scope of collaboration to include the 32nm and finer nodes with IBM and its alliance partners, the Japanese company said.

Specifically, NEC intends to work with the IBM research alliance to develop a common process platform and strengthen development and design ability for system-on-a-chip (SOC) technology--highly integrated silicon typically used in cell phones and consumer electronics devices.

"The new agreement with IBM means that NEC Electronics will develop a common semiconductor process with industry leaders, allowing us to focus on being first to market in areas of eDRAM products and SOC solutions that provide our customers with the added value, such as high reliability and low power consumption," Toshio Nakajima, president and CEO of NEC Electronics, said in a statement.

eDRAM, or embedded DRAM, is high-speed memory usually integrated onto the same piece of silicon as the main processor. This contrasts with traditional DRAM that is external to the processor. eDRAM can be used, for example, in system-on-a-chip designs.

Earlier this year, IBM and its partners unveiled "high-k/metal gate" on silicon manufactured at IBM's 300-millimeter semiconductor fabrication facility in East Fishkill--a technique that Intel also uses.

By implementing high-k/metal gate technology into its leading edge 32-nm technology, the alliance claims performance improvements in circuits of up to 35 percent over 45nm technology at the same operating voltage. The 32nm power reduction over 45nm can be as much as 30 percent to 50 percent depending on the operating voltage, according to IBM.

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About Nanotech - The Circuits Blog

Brooke Crothers has served as an editor at large at CNET News, an editor at Dow Jones' Asian Wall Street Journal Weekly, and a senior editor at InfoWorld. His CNET blog covers chip technology and computer systems, and how they define the computing experience. He also contributes to The New York Times' Bits and Technology sections. He is a member of the CNET Blog Network and is not an employee of CNET. Disclosure.

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