Nanotech - The Circuits Blog

IBM scientists have imaged the chemical structure of an individual molecule, increasing the possibility for creating electronic building blocks on the atomic and molecular scale.

By using an atomically sharp metal tip terminated with a carbon monoxide molecule, IBM scientists were able to obtain an image of the inner structure of the molecule. The colored surface represents experimental data. The model below shows the position of the atoms within the molecule.

(Credit: IBM)

Scientists In Zurich, Switzerland, have, for the first time, imaged the "anatomy," or chemical structure, of an individual molecule with "unprecedented" resolution, using noncontact atomic force microscopy (AFM), IBM said Thursday. Resolving individual atoms within a molecule has been a long-standing goal of surface microscopy, according to the computer company, which has a research and development program dating back to 1945.

This research will be essential for building computing elements at the atomic scale that are vastly smaller, faster and more energy-efficient than today's processors and memory devices, IBM said.

The research is reported in the August 28 issue of Science magazine.

Though in recent years progress has been made in research of nanostructures on the atomic scale with AFM, imaging the chemical structure of an entire molecule has never been achieved with atomic resolution, according to IBM.

The atomic force microscopy was done in an ultrahigh vacuum and at very low temperatures (5 Kelvin equals minus 268 degrees Centigrade or minus 451 Fahrenheit) to image the chemical structure of individual pentacene molecules. Pentacene has a crystal structure that gives it properties as an organic semiconductor.

Scientists were able "to look through the electron cloud and see the atomic backbone of an individual molecule for the first time." This is roughly analogous to X-rays that pass through soft tissue to enable clear images of bones, IBM said.

The Science magazine article follows another piece published two months ago in the June 12 issue of the magazine covering the "determination of atomic charge states." The results discussed in both of these articles will "open new possibilities for investigating how charge propagates through molecules or molecular networks," IBM said.

Understanding the charge distribution may lead to building computing elements ... Read more

The Hot Chips conference in Palo Alto, Calif this week is focusing on high-end chips for servers and scientific computers, with IBM's upcoming Power7 as a standout.

On Tuesday, IBM will give a presentation on its next-generation server chip, the Power7. IBM documentation describes the chip as having up to eight cores. A dual-chip module holds two processors for a total of 16 cores, according to IBM.

Each core has a rated performance of 32 gigaflops, providing 256 gigaflops per processor--one of the fastest chips to date based on this scientific-centric performance benchmark.

Power7 will be used in the National Center for Supercomputing Applications "Blue Waters" supercomputer, the first system of its kind to sustain one petaflop performance on a range of science and engineering applications, according to the NCSA. A petaflop is one quadrillion floating point operations per second.

Power7 "will be the first of a powerful new system design from IBM. The design includes extensive research and development in new chip technology, interconnect technology, operating systems, compiler, and programming environments," according to the NCSA.

Other chips to be described at the conference include the Sparc64 VIIIfx: Fujitsu's new 8-core processor for Peta scale computing. Sun will discuss its "next-generation multi-threaded processor Rainbow Falls" and AMD will spell out its Magny Cours processor, 12-core chip.

Intel will present a paper on its upcoming Nehalem server processor.

Intel will also discuss Moorestown, an upcoming version of the Atom processor targeted at mobile Internet devices and smartphones. Intel will also give a presentation entitled "Understanding the Intel Next Generation Microarchitectures (Nehalem and Westmere) transitioning into the Mainstream."

As chip geometries get infinitesimally small, IBM is looking to DNA to make the manufacture of future chips feasible.

On Monday, IBM researchers and collaborator Paul W.K. Rothemund, of the California Institute of Technology, announced an advancement of a method to arrange DNA origami structures on surfaces compatible with today's semiconductor manufacturing equipment.

Low concentrations of triangular DNA origami bind to wide lines on a lithographically patterned surface.

(Credit: PRNewsFoto/IBM)

"The cost involved in shrinking (chip) features to improve performance is a limiting factor in keeping pace with Moore's Law and a concern across the semiconductor industry," said Spike Narayan, a manager in the Science & Technology division of IBM Research, in a statement.

Moore's Law, named after Intel co-founder Gordon Moore, states that the number of transistors that can be placed on an integrated circuit doubles roughly every two years. For more than four decades, chip manufacturers have been able to consistently shrink chip geometries, allowing Moore's Law to remain on track.

But this may not be sustainable for chips with geometries under 22 nanometers. By 2014, the high cost of semiconductor manufacturing equipment will threaten Moore's Law, "altering the fundamental economics of the industry," according to a report released in June by iSuppli. New chip plants typically cost billions of dollars to build, and the tab goes up as chip circuits get smaller.

Individual triangular DNA origami adhere to a template with properly sized triangular features.

(Credit: PRNewsFoto/IBM)

IBM uses DNA molecules as scaffolding--where millions of carbon nanotubes could be deposited and self-assembled into precise patterns by sticking to the DNA molecules. This approach might provide a way to reach sub-22-nanometer lithography--down to 6 nanometers--more economically, according to a paper to be published in the September issue of Nature Nanotechnology, entitled "Placement and orientation of DNA nanostructures on lithographically patterned surfaces." It was co-authored by IBM and Caltech scientists.

"The utility of this approach lies in the fact that the positioned DNA nanostructures can serve as scaffolds, or miniature circuit boards, for the precise assembly of components, such as carbon nanotubes, nanowires, and nanoparticles," according to IBM. The combination of self-assembly with today's fabrication technology eventually could lead to substantial savings in the most expensive and challenging part of the chipmaking process, IBM said.

The lithographic templates, for chip fabrication, were made by IBM using traditional semiconductor techniques, the same used to make the chips found in today's computers, to etch out patterns.

Updated on Monday, June 15 at 2:20 p.m. PDT: adding multi-core discussion to earlier Windows update.

It's been four years this month since Apple announced it would drop the PowerPC architecture and switch to Intel's x86 design. One person involved in the back-and-forth between Apple and IBM at the time provides some insight into why it happened.

Apple laptop using the PowerPC G3 processor

(Credit: CNET Networks)

When Apple made the watershed announcement in June 2005 ending its longstanding relationship with IBM and Motorola, Apple CEO Steve Jobs attributed the switch to a superior Intel roadmap.

"Looking ahead Intel has the strongest processor roadmap by far," Jobs said in a statement at the time. "It's been ten years since our transition to the PowerPC, and we think Intel's technology will help us create the best personal computers for the next ten years."

One oft-cited reason was that Apple didn't believe it could get the requisite performance per watt from processors being supplied by IBM and Freescale--formerly Motorola's chipmaking arm. Translation: Apple was worried about IBM's and Motorola's ability to deliver competitive processors for laptops. (Update: Another reason often put forward is that Apple simply wanted to be able to run Windows.)

A former IBM executive, who worked at IBM at the time and was involved in discussions with Apple, offered his perspective in a conversation we had during dinner at a recent technology conference. Let me emphasize that this is one person's opinion, not necessarily the gospel truth. I will not publish his name or title.

While he acknowledged the public reasons put forward by Apple, there was more to it--not surprisingly--than that. The upshot: Apple wanted better pricing, according to this person.

Apple was paying a premium for IBM silicon, he said, creating a Catch-22. IBM had to charge more because it didn't have the economies of scale of Intel, but Apple didn't want to pay more, even though it supposedly derived more from an inherently superior RISC design as manifested in the PowerPC architecture.

Here's what Jobs said in 2003: "The PowerPC G5 changes all the rules. This 64-bit race car is the heart of our new Power Mac G5, now the world's fastest desktop computer," Jobs said in a statement. "IBM offers the most advanced processor design and manufacturing expertise on earth, and this is just the beginning of a long and productive relationship." (Sounds suspiciously similar to what Jobs said about Intel after Apple made the switch.)

Despite the praise heaped on IBM's technology in 2003, Apple believed, by 2005, that it couldn't compete on cost, according to this person.

Intel on Tuesday said it will ship a server chip that contains up to eight processing cores later this year, while IBM showed off a high-end server in the works that uses eight such chips, yielding 64 cores.

Intel's Nehalem-EX architecture supports up to eight processors and each processor can integrate up to eight cores.

(Credit: Intel)

Intel's Nehalem-EX processor, in production later this year and expected to be shipping in high-end server systems by early 2010, will feature up to eight cores inside a single chip that supports 16 threads, according to Boyd Davis, Intel's general manager of the Server Platforms Marketing Group, speaking at a teleconference on Tuesday.

Using threads, Intel essentially doubles the amount of work that can be done on each processing core.

IBM, which participated in the conference, discussed a server currently under development that uses 64 Nehalem-EX cores (eight processors) and can handle 128 threads, according to Alex Yost, vice president IBM BladeCenter. "We're very excited today to be the first to demonstrate Nehalem-EX," Yost said.

Nehalem-EX will also double the memory capacity with up to 16 memory slots per processor socket, and offer four high-bandwidth "QuickPath" Interconnect links.

Intel also said the currently-shipping Nehalem server chip is making market gains. Intel's currently-available Xeon 5500, the first server processor based on Intel's Nehalem architecture, will be "greater than half of shipments" for Intel's high-volume two-processor (aka, "two-socket") server shipments by August, according to Davis.

"Customer acceptance has been quite strong," Boyd said. "From an introduction at the very end of March to representing the majority of our shipments in the market for two-processor servers by the August time frame," he said.

Intel showed off a prototype server that can accommodate four eight-core Nehalem-EX processors.

(Credit: Stephen Shankland/CNET)

Intel's prototype Nehalem-EX server accommodates eight of these memory cards. They'll use relatively conventional DDR3 memory rather than the FB-DIMM technology Intel's current Xeon 7300 systems.

(Credit: Stephen Shankland/CNET)

IBM, Samsung Electronics, STMicroelectronics, and others are teaming up on the development of next-generation chip technology for small, low-power devices with one wary eye on Intel, which is expediting its move to chips with smaller geometries.

(Credit: IBM)

IBM and its semiconductor technology alliance partners are announcing the availability of 28-nanometer (nm) chip technology, a little more than a generation beyond the 45nm technologies currently used by Intel and Advanced Micro Devices in their latest chips.

The first products using chips based on this technology are expected in the second half of 2010, an IBM spokesman said. Devices will include smartphones and consumer electronics products.

The largest, single countervailing force to the IBM-led group is Intel. The Santa Clara, Calif.-based chip giant's chief executive, Paul Otellini, said Tuesday in a first-quarter earnings conference call that Intel is "pulling in" the release of "Westmere" chips based on 32nm technology and will ship silicon later this year.

Generally, the smaller the geometry, the faster and more power efficient the chip is.

The IBM alliance--which also includes the AMD manufacturing spin-off Globalfoundries, Chartered Semiconductor, and Infineon Technologies--are jointly developing the 28nm chipmaking process based on the partners' "high-k metal gate" (which minimizes current leakage), low-power complementary metal oxide semiconductor (CMOS) process technology.

The technology "can provide a 40 percent performance improvement and a more than 20 percent reduction in power, in a chip that is half the size, compared with 45nm technology," IBM said in a statement. "These improvements enable microchip designs with outstanding performance, smaller feature sizes and low standby power, contributing to faster processing speed and longer battery life in next-generation mobile Internet devices and other systems."

IBM said customers can begin their designs now using 32nm technology and then transition to 28nm for density and power advantages without the need for a major redesign.

One prominent customer is U.K.-based ARM, whose basic chip design has been used in billions of devices all over the world. ARM is collaborating with the IBM alliance to develop a design platform for 32nm and 28nm technology and is tuning its Cortex processor family and future processors to exploit the technology's capabilities, IBM said.

In the wake of reported merger talks with IBM, Sun Microsystems executive vice president John Fowler talked about Big Blue as a rival.

Sun Microsystems executive vice president John Fowler

(Credit: Sun Microsystems)

Fowler, in a phone interview Friday, discussed IBM as a competitor in the server computer market and the competitive differences between Intel and Advanced Micro Devices.

"IBM is obviously a classic competition space where we bring to bear all of our technology innovation," Fowler said. "In this particular case, how we've incorporated and done networking technology, how we've incorporated and done flash (memory). The fact that we have an open operating system that runs across our RISC platforms and our x86 platforms and that we have an open storage offering on the 7000," he said.

Fowler continued, "Those are all great discussions to go have with IBM customers. Those are all things that IBM just doesn't have and represent a significant amount of value."

In a question about comparing IBM--which also offers a RISC architecture server platform (PowerPC) as well Intel and AMD--to other competitors like Hewlett-Packard and Dell, Fowler said: "They (IBM) are more similar (to Sun) than the others and interested in more of the same things."

And how does Sun compete with larger rivals? "We have for decades now innovated in a marketplace where companies like HP and IBM have been consistently bigger than us. What we do is incorporate new technologies or invent new technologies more quickly," he said.

Fowler also spoke of some of the differences between Sun offerings on AMD and Intel platforms. He began by saying that a recent Intel Nehalem server chip announcement covers only two-socket (a socket accommodates one processor) servers and that Intel's product is an "entry level" product. "It's a solid product but it really applies to the volume entry-level systems in the world today," he said.

Fowler continued: "Obviously, AMD and (Sun) SPARC cover a much broader range of application scale. In AMD's case, extending up to eight-socket servers and in SPARC's case up to 64-socket servers," he said.

Moore's Law is maxing out. This is an oft-made prediction in the computer industry. The latest to chime in is an IBM fellow, according to a report.

Intel co-founder Gordon Moore predicted in 1965 that the number of transistors on a microprocessor would double approximately every two years--a prediction that has proved to be remarkably resilient. But IBM Fellow Carl Anderson, who researches server computer design at IBM, claims the end of the era of Moore's Law is nigh, according to a report in EE Times.

Exponential growth in every industry eventually has to come to an end, according Anderson, who cited railroads and speed increases in the aircraft industry, the report said.

"A generation or two of continued exponential growth will likely continue only for leading-edge chips such as multicore microprocessors, but more designers are finding that everyday applications do not require the latest physical designs," Anderson said in the EE Times' report. Anderson also cited the staggering costs of research and fabs (factories) as a formidable barrier for continued advancement. Few companies can afford chip plants that typically cost billions of dollars to build and maintain.

So, what does the future hold? Anderson cited three technologies: optical interconnects, 3D chips--which have circuits and components stacked on top of each other--and accelerator-based processing as seeing significant advancements, the report said. The latter technology, accelerators, is hot right now.

In addition to IBM, companies such as Nvidia and Advanced Micro Devices' ATI unit supply graphics-processor-based computers to accelerate scientific, engineering, and animation applications. Intel is also expected to bring out its Larrabee chip later this year or early next year that can be used as an accelerator.

Updated on March 30 at 1:50 p.m. PDT with additional information throughout.

Intel's Nehalem-architecture chips will now try to make their mark in servers, after debuting in desktops in November.

On Monday, Intel is rolling out new Nehalem-based Xeon models targeted at servers using up to two processors. Nehalem offers some important firsts for Intel, including an integrated memory controller for better performance, hyper-threading for up to 16 virtual cores (which improves multitasking), and Turbo Boost Technology, which dynamically increases the processor's frequency (speed), as needed.

Pat Gelsinger, senior vice president at Intel, speaks at Nehalem server chip launch Monday.

(Credit: Screen capture by Brooke Crothers)

"Our most important server launch in well over a decade," said Intel Senior Vice President Pat Gelsinger, speaking on Monday at the Nehalem server chip launch event in San Francisco, which was streamed live over the Web. Gelsinger said Intel has already shipped hundreds of thousands of quad-core Xeon 5500 processors--which pack in just over 730 million transistors--to mostly high-performance computing customers. Gelsinger also said future 32-nanometer "Westmere" versions will have six cores and be essentially drop-in replacements for the current 45-nanometer Xeon 5500.

The announcement is anticlimactic to some extent. Apple has already announced a new Mac Pro using the Nehalem Xeon 5500 processor and last month Intel discussed how Nehalem will be used in new "Willowbrook" servers in mega data centers.

But fresh announcements were made Monday from the largest server suppliers in the world, including IBM. "You can get anywhere from a 20 percent to a 200 percent performance improvement going from (Intel's) existing 'Harpertown' processor," said Alex Yost, vice president IBM BladeCenter. IBM is the largest server supplier in the world based on revenue, holding about a 33 percent share of the market, according to Gartner.

"We did install a bunch of early systems at key clients on Wall Street and I am very encouraged," he said. Yost added, however, that at the processor level Nehalem offers virtually no difference in power savings over previous generations of Intel chips. Improved power efficiency can be achieved other ways, though: for example, using virtualization to condense many virtual servers into a single physical server or using more power-efficient motherboards. Moving from rack-based servers to blade servers can also boost power efficiency.

Dreamworks has also been a high-profile early adopter of Nehalem. Prior to Nehalem, Dreamworks had to wait overnight to get an animation rendering project completed but this can be done almost in real time with the new processor, according to Intel and Dreamworks.

Josh Crowe, vice president of engineering at Savvis, an outsourcing business, said Nehalem offers better virtualization technology for customers whose budgets "have been cut to next to nothing" because of the tough economic times. "The consolidation ratios are going to be massively improved," he said, referring to the ability to bring many virtual servers into one physical server box.

Analysts don't expect Nehalem to cause seismic shifts in chip market share because Intel processors already claim a disproportionate chunk of the server market. "We expect only an incremental upside on a unit basis," said Ashok Kumar, an analyst at investment bank Collins Stewart. More importantly, Kumar is closely watching Cisco's entry into the server market. "If the Cisco relationship opens up new market opportunities, that's where the upside will be."