Business Tech

Earlier this week, EMC revealed that it has attracted longtime Intel executive Pat Gelsinger to run its storage business.

Gelsinger is set to become president and chief operating officer of EMC's Information Infrastructure Products (virtually all in EMC's product group except VMware), including the Enterprise Storage Division, RSA Information Security, Content Management and Archiving, and Ionix IT Management. His direct reports will be Frank Hauck, who now leads ESD, Mark Lewis of CMA, Art Coviello of RSA, and Jay Mastaj of Ionix.

A Wall Street Journal blog post quotes Gelsinger as ultimately wanting to be Intel's president, but that wasn't something that was going to happen anytime soon. In that the move is effective immediately, Gelsinger will likely not be a keynote speaker at the Intel Developer Forum, as originally planned.

Pat Gelsinger

(Credit: Intel)

Gelsinger is an interesting acquisition for EMC, as it diversifies its way toward encompassing more and more traditional IT infrastructure products and services, as well as IT virtualization and emerging cloud-computing models. His chip geek credentials are solid. He wrote the book on programming the 80386, and he designed the original 486 processor. At EMC, he will move to bring to market products based on a tighter integration between existing product lines, as well as those from VMware and some key partners (read Cisco Systems).

While Gelsinger is a hard-driving executive, he reveals an actively spiritual side of himself in his book "The Juggling Act: Bringing Balance to your Faith, Family, and Work."

While the Gelsinger move seems to have attracted the most media attention, there's way more to this story. As part of the executive personnel announcement, Howard Elias was promoted to president and chief operating officer of information infrastructure and cloud services at EMC.

Previously, Elias was president of EMC Global Services and EMC's Ionix IT management group. He will now be responsible for all of EMC's service groups, including those attached to the products groups. Elias also gets to champion EMC's moves into cloud services.

For me, the hidden word here is "services." IBM spawned IGS. HP bought EDS. There's a void here that I think Elias has to fill. Can Elias give EMC a services powerhouse? Can he successfully blend the more traditional IT services with the newly emerging cloud-computing models? As I see it, those are Elias' challenges.

What's going on at the top? First, Tucci believes that the current executive management structure needs to be enhanced and expended, as it progresses from $14 billion in annual revenue to a $20 billion to $25 billion IT infrastructure company capable of competing with the likes of IBM and Hewlett-Packard. Hence the division of responsibility along the line of products vs. services.

The Wall Street Journal reports that Tucci has, with this new management structure, set up something of a three-way, three-year competition to become his successor, as Tucci also announced that he plans to remain president and CEO through 2012. Now in the running, according to the Journal report, are Gelsinger, Elias, and David Goulden, EMC's current executive vice president and chief financial officer.

Tucci is certainly laying his cards on the table for Wall Street to see, and Wall Street appears to like the move, pushing EMC shares upward over the last week. His latest moves help discourage rumors that EMC is in play as a takeover candidate.

Intel's Pat Gelsinger

(Credit: Intel)

Editors' note, Monday 6:16 a.m. PDT: Intel and EMC have officially announced executive changes as outlined below. See the new story for more details.

Intel is expected to announce a management shakeup Monday that will see Senior Vice President Pat Gelsinger leaving after 30 years at the chip giant, according to a report in the New York Times.

Management changes will include sales and marketing chief Sean Maloney taking over the company's major chip businesses, while laptop chips head Dadi Perlmutter will take over engineering for all chip divisions, according to the report.

The official announcement is expected before the market opens Monday, according to one person familiar with the changes.

Gelsinger, senior vice president and co-general manager of Intel's Digital Enterprise Group, joined Intel in 1979. He led Intel Labs, which encompasses many Intel research activities, and was Intel's chief technology officer.

Gelsinger has been a high-profile presence at many Intel forums over the years including its marquee Intel Developer Forum event.

Maloney, Intel's sales chief, is also considered to be a possible successor to Intel CEO Paul Otellini.

Intel representatives declined to comment on the report.

Update, Monday 5:36 a.m. PDT: The Wall Street Journal reported overnight that EMC is expected to announce Monday that it is hiring Gelsinger to run its storage products business, along with some software units.

Intel is celebrating its four-decade-long relationship with Stanford University by spotlighting the school's nexus with its top executives.

The Intel-Stanford tie famously began back in 1969 when Stanford electrical engineering alumnus Ted Hoff became Intel employee No. 12. Within two years, he had invented, along with Federico Faggin and Stan Mazor, Intel's flagship product: the microprocessor.

For more than four decades, the Stanford-Intel relationship has been behind the launch of some of Intel's flagship technologies and hundreds of the company's engineering careers. (Almost 1,000 Stanford alumni have worked at Intel and a Stanford University Web page marks this relationship.)

(Credit: Stanford University)

The retirement this month of Intel chairman and former CEO (1998-2005) Craig Barrett, highlights one of the most enduring ties. Barrett was a professor from 1965 until he joined Intel in 1974.

"Industry does a good job at the D part of R&D--but we rely on the tier-one research universities like Stanford on the R side," Barrett said in an interview published on Stanford University's Web site. Barrett cited marquee research at Stanford such as semiconductor device modeling and new packaging technologies.

Senior VP Pat Gelsinger is another Stanford graduate. "We've had great results from the collaboration," said Gelsinger--also quoted in the interview--who earned an masters of science degree in electrical engineering at Stanford in 1985. "In almost every area that Intel is doing work we can point to significant collaboration and research projects with Stanford."

SAN FRANCISCO--Intel plans to bring its first dual-core Atom to market next month, it was revealed here Monday during the Intel Developer Forum. The chipmaker also disclosed more details of the Nehalem processor.

The power-efficient processor will be targeted at Atom-based desktops called nettops. Currently, Intel offers the Atom N230 processor for nettops. This chip has a slightly higher power envelope than the Atom processors built exclusively for mobile devices.

That news was revealed to this reporter by an Intel employee as senior vice president Pat Gelsinger was delivering his IDF keynote, which included more specifics about Nehalem, the family of chips the company plans to begin rolling out in the fourth quarter. Gelsinger, the general manager of Intel's Digital Enterprise Group, showed the first wafer holding individual eight-core processors, detailed the power-saving features of the Nehalem processors, and confirmed future mobile Nehalem processors.

Intel Nehalem processor lineup as shown at IDF 2008

(Credit: Intel)

Also due in September is the six-core Dunnington server processor, the final member of Intel's 45-nanometer "Penryn" family, which will ship to customers next month, Gelsinger said.

Most of his keynote centered on Nehalem, and one of the features Intel was pushing hard at IDF was a technology called Turbo mode.

Turbo mode is essentially a switch that turns off unused processor cores and then uses the remaining active cores more efficiently. This kind of sophisticated power-management technology will be used in both Nehalem-based laptops and servers, according to Gelsinger, and will become increasingly necessary as Intel brings out chips with more cores like the eight-core Nehalem processor due next year.

In short, in multi-core processors, cores not doing much can still use power. So, it's better to use, for example, a couple of cores more efficiently than four cores inefficiently.

The power saving technology is enabled by "an integrated microcontroller which only works on power management," said Rajesh Kumar, an Intel Fellow, who spoke during Gelsinger's keynote. There are about 1 million transistors dedicated solely to power management, Kumar said.

The feature "requires no operating system intervention. It is fully detected and managed by the hardware. If it has detected an idle core, it is able to reallocate that power budget to the other cores," Gelsinger said in an interview after his keynote.

On another front, Intel showed the first eight-core Nehalem chip. "This is the first showing of the eight-core Nehalem-EX," Gelsinger said in his keynote. He said the chip is a monolithic design, meaning that all eight cores are on one piece of silicon.

Nehalem-EP, or Nehalem Efficient Performance, will be a quad-core chip for mainstream servers and workstations. What Intel traditionally calls two-socket servers, Gelsinger said.

The mainstream desktop will be the Core i7. "With the i7 we have high-end desktop and extreme," Gelsinger said. The extreme edition is for overclockers, he said. Enthusiast gamers often overclock processors (ratcheting up clock speed beyond the rated speed) to gain extra performance.

"Turbo Mode" is a linchpin Nehalem technology

(Credit: Intel)

But there will be more pedestrian dual-core versions of Nehalem too. "There will be versions for the desktop that will be dual-core as well," Gelsinger said.

Gelsinger also talked about Intel's plans to put graphics directly onto the same piece of silicon as the processor. This will be a first for Intel.

He described why Intel is putting graphics right next to the processor. "There's a big sucking sound near the CPU. It keeps pulling things closer to it. This is uniquely enabled by Moore's Law...and as things get closer together I'm able to drive down thermal envelopes (i.e., heat) and decrease physical form factors (i.e., enable smaller computer designs)," Gelsinger said.

Gelsinger broke down the future processor lineup--with graphics on the processor die and without--as follows. "Lynnfield and Clarksfield are the versions without graphics. Havendale and Auburndale are the versions with integrated graphics." (Even Intel executives occasionally get confused by all the code names and it took two tries for Gelsinger to get this right.)