March 22, 2004 9:46 AM PST

TI sets out for 65 nanometers

Texas Instruments has taken its first few steps toward a new generation of chip manufacturing technology that promises higher performance and less power-hungry processors.

The Dallas company on Monday said it has created static random access memory (SRAM) based on its forthcoming 65-nanometer manufacturing process. The company plans to manufacture chips using the process in 2005.

TI, Intel and other chipmakers currently makes chips using 90-nanometer chip manufacturing processes. Generally, chipmakers move their leading products to new manufacturing processes every two years, following the pace of Moore's Law. Many manufacturers began the shift to 90-nanometer chips in 2003, and have begun shipping 90-nanometer chips in large quantities this year. TI used its 90-nanometer process to boost some of its digital signal processor chips to 1GHz, for example.

Intel also has produced SRAM chips with a 65-nanometer process and plans to come out with chips using the process in 2005.

The nanometer figure refers to the average size of features on chips produced with the process. A nanometer is a billionth of meter. When chipmakers reduce the size of those features by adopting a new manufacturing process, they typically increase performance and reduce energy consumption.

Limiting power consumption in chips--which is becoming increasingly difficult as chips gain transistors--boosts devices that use batteries, such as handhelds. Power consumption also is an important consideration for organizations that run large numbers of servers.

TI expects that its 65-nanometer manufacturing process will cut the size of its new chips by half and boost their transistor performance 40 percent compared with 90-nanometer chips. The company has designed power-saving techniques for the new chips, such as reducing leakage power from idle transistors. Another technique, dubbed SmartReflex, is expected to help control the power consumption of certain wireless chips, such as TI's OMAP processor, by adjusting their voltage based on the demands on the chips.

The 65-nanometer process "doubles the transistor density over our qualified 90-nanometer production process and positions Texas Instruments for a leadership role in delivering the benefits of 65 nanometer to customers early next year," Hans Stork, TI's chief technology officer, said in a statement. "Along with the tremendous increase in functionality TI will offer at 65 nanometers with highly integrated designs, we are taking significant steps to lead the industry in managing the power those designs consume."

In addition, TI plans to offer various "recipes" for manufacturing different products. A low-power formula will be used to produce chips for portable products such as handhelds, digital cameras and audio players. A middle-of-the-road blend will be used for digital signal processors and communications chips. A high-performance manufacturing process will support products such as Sun Microsystems' UltraSparc processor. TI manufactures the UltraSparc chip for Sun.

TI said it expects to test its first wireless chip using the 65-nanometer process in the first quarter of 2005 and move the process into mass production later in the year.

 

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