March 20, 2006 9:37 PM PST
Sun to release open-source Sparc designs
The move fulfills a commitment to employ the widely used open-source license that Sun President Jonathan Schwartz made at the Open Source Business Conference in January. David Yen, executive vice president of Sun's Sparc server group, is expected to discuss the move at the MultiCore Expo, which runs Tuesday through Thursday in Santa Clara, Calif., where Sun also has its headquarters.
Sun's UltraSparc T1 has eight processing engines, called cores, each able to run four simultaneous instruction sequences, called threads. When one thread stalls because it has to retrieve data from comparatively slow memory, a core switches to another thread. This approach is designed to let T2000 and forthcoming T1000 servers run many jobs in parallel with good performance, even though an individual job may not get done as fast as on a more single-minded chip.
The OpenSparc project is designed to increase the relevance of Sun's Sparc family, which has lost market share in recent years to Power chips from IBM and to x86 chips from Intel and Advanced Micro Devices. Sun hopes that making the designs available in the Verilog format will trigger research projects and commercial development.
The General Public License (GPL) was developed by Richard Stallman and is a cornerstone of his free-software movement and the closely related open-source software concept. It lets a program's underlying source code be seen, modified and distributed by anyone, so long as anyone who distributes a changed version publishes those changes under the same license.
One company, SimplyRISC, plans to make a single-core version of Niagara for embedded computing devices, which often require low power consumption. And a chip design company called Aldec plans to make its Riviera software available for 90-day free trials so people can simulate Verilog designs.
In conjunction with the chip designs, Sun also has published at its OpenSparc.net site the UltraSparc Architecture 2005, which defines the set of instructions the chips can execute. In addition, the company has published verification software and simulation models to test software on chip designs, as well as a version of its Solaris 10 operating system that can be used in such simulations.
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