January 17, 2007 9:00 PM PST
Sun speeds Niagara servers
Current T1000 and T2000 servers use 1GHz or 1.2GHz processors, but the new models' chips run at 1.4GHz. In addition, the maximum memory has been increased to 64GB from 32GB, which in combination with the faster chips mean overall performance increases 30 percent, said Fadi Azhari, director of marketing for multicore Sparc technology.
A high-end Niagara T2000 system with a 1.2GHz processor and 64GB of memory costs about $68,000, but moving to the 1.4GHz processor increases the price to $85,000, according to Sun's store.
Sun's Niagara servers, along with the "Galaxy" line of x86 servers, are the two central features of Sun's effort to reclaim its relevance, profits and server market share.
Sun is trying to reinvigorate its Sparc processor line, though, with chips that aggressively embrace the multicore technology to squeeze multiple processing engines on one slice of silicon. Niagara has eight cores, each able to simultaneously execute four independent instruction sequences called threads, and Niagara II servers due in the second half of 2007 will support eight threads per core.
Niagara systems are geared for relatively low-end jobs where it's more important how many jobs can be accomplished at the same time than the absolute speed from start to finish of one particular job. In the second half of 2008, Sun plans to release servers based on its "Rock" chip, a high-end 16-core cousin to Niagara that's geared to execute threads fast as well as in profusion.
The Rock chip taped out on January 3, Azhari said, referring to the design completion milestone. (The term "tapeout" derives from the olden-day practice of shipping a chip design on magnetic tape from the engineers to the chip manufacturer.) Because the tapeout slipped into 2007, engineers lost an internal contest and therefore had to wear ties, briefly, Azhari said.
In addition, Sun announced "Neptune," a new custom processor to boost networking for its multicore machines. The chip is designed for network cards that will more gracefully link the multicore Sparc or x86 chips with multiple 10-gigabit-per-second Ethernet connections.
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