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Sun: Niagara sequel more power-efficient
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Sun has high expectations for Niagara
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July 19, 2004
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A key part of that performance comes from what Sun calls scout threads.
Scout threads run about 250 steps ahead of the main threads the chip is actually processing. The scouts try to predict the best path to take when they reach branches in the sequences of instructions taken, and they fetch data the main thread likely will need from main memory so it's stored in relatively fast-response cache memory.
"The scout is the guy who does all the dirty work--all the snow-plowing in front of the main thread," Tremblay said.
Sun was happy enough with the scout thread performance that it chose to pair one scout thread with each regular thread in Rock, Tremblay said. The two threads tend to run at opposite times, with the regular thread launching a scout thread only when it stalls waiting for data from memory, so Rock avoids some of the heating problems caused by multiple threads running simultaneously, Tremblay said.
One consequence of the fast-thread priority is that the chip's clock speed matters more than in Niagara, which runs at a comparatively slow 1.2GHz, Tremblay added. The x86 chips from Intel and AMD have stayed in the 3GHz neighborhood as the companies moved to multicore designs.
Out of order
To speed execution, most modern chips don't methodically execute instruction sequences in a plodding, linear fashion. Instead, they employ various techniques such as out-of-order execution and speculative execution to get a jump on instructions a few steps ahead of the regular sequence.
Niagara employs none of these techniques, each of which requires more circuitry and therefore increases the chip size and power consumption. But Rock takes the opposite approach--and then some.
Rock goes a step beyond with something called out-of-order retirement, Tremblay said. When an instruction is retired, it means the chip has completed that step of processing and has committed its results to internal memory slots called registers.
With speculative execution, the chip makes its best guess about whether or not to take particular branches--conditional decision points that depend on the results of existing calculations. Current chips are able to speculate about the best choices to take, storing results in temporary locations called intermediate registers, Brookwood said. But they don't commit those results to the real registers until the chip is sure the choices were correct.
With out-of-order retirement, the chip commits its speculative results to memory and moves on without having to wait for validation. "What Rock will let you do is actually finish the instruction and maybe finish more instructions beyond it," Brookwood said.
If the choices proved to be the wrong ones, the chip can quickly back up to the earlier state, and software moves backward along with it so that incorrect results aren't produced, Brookwood said. "It's an undo button...for the stuff that's been committed," he said.
Software doesn't need to be rewritten to support out-of-order retirement, Tremblay said. Preserving compatibility is one of Sun's high chip priorities.
Sun had an awkward phase with its processor plans, ripping up its road map, canceling the UltraSparc V chip and relying instead on a partnership with fellow Sparc chip designer Fujitsu. But the company now has a simpler, more attainable strategy, Quick said, and Sun is eager to boast about its progress.
"We are very excited right now about how Sparc is going," Fowler said.
See more CNET content tagged:
multi-core, Sun Microsystems Inc., Sun Sparc, dual-core, IBM Corp.




One aspect that is favorable for Sun's many-core technology is that Oracle offers a very favorable licensing (.25 per core) model. I do cover cool threads on my blog with particular interest in the FPU technology these processors have:
http://kevinclosson.wordpress.com/2006/11/30/marketing-efforts-prove-sunfire-t2000-is-not-fit-for-oracle/
Sparc is second only to x86 in terms of development and support. I guess you are saying if it is not x86 then it is dead? Tell that to the members and users of sparc, power, and itanium.
"Sun needs to make x86 compatible servers."
x2100, x2200, x4100, x4200, x4500, x4600, SE5320, SB8000.
Are you sure about anything you are saying?
People should care more about their applications than hardware, and the the fact of the matter is that if you have an application, more than likely it will run on Sun.
They will be very good for some types of applications, near useless for others. I would love to get a few of these for use in raytracing.
those threads from being shifted to another processor by the OS?
While it won't guarantee best performance, I wouldn't call it near
useless.
Long pipelines are only needed for high clock rate designs, such as Intel's Pentium IV Netburst architecture. It is possible to get high clock rates with shorter pipelines, as IBM is claiming with POWER6. But at moderate clock rates (2-3 GHz), like currently on Intel Core and AMD Opteron designs, long pipelines are not required.
Long pipelines should not be required for a design like Rock. It is basically 16 relatively simple SPARC cores (along with some advancements like the scout thread) on a single chip. I doubt Sun would design the chip with long pipelines if the design doesn't require it. That would just decrease efficiency.
Second, regarding compilers, this chip will simply look like a 16 socket server to the OS and application. The scout thread has be described as "an intelligent prefetch", so it should also be transparent to the OS and application.
Parallelizing compilers will be necessary, but the SMP revolution happened 15 years ago, and the massive SMP revolution happened 10 years ago, so the software should already be ready.
I love my Power PC, nothing maches it up to that point in Date development in my opinion, not a single freeze or a crash on my Power Mac Machine, non-stop use for a year.
EVerything from Photoshop, to Apache, I do it all, beautiful machine, and I will snatch up more as people upgrade for a sweet song, these are great machines.
NiagaraIII will replace ROCK. ROCK or "Regatta On a Chip Killer" is too expensive and is being designed by a seperate group than Niagara. The same pipeline issues which caused the cancellation of SPARC V are in ROCK and it has the "Millenium Bug". I guess not the first time Sun is hypeing a project they plan to cancel.
SUN is the emperor of throughput computing. My expectation is that SUNW might be $10 in year 2007 ( i have some SUNW shares with me ).
I will say their sales force is superior to anything I've ever encountered, but their technology never did anything for me.
Putting 16 cores on a chip is probably about the most exciting thing I've ever seen them do.
I hate to see any company go out of business. Who knows, hopefully they'll pull one out of their hat and business will pick up. I hope it does, but I'm not going to bet on it.
Charles R. Whealton
Charles Whealton @ pleasedontspam.com
Thanks
It is getting boring.
I am just jealous that they had recently 3 consecutive quarters of year-over-year revenue growth.
So to hit 10.00 a share, people would have to believe Sun could make 2 billion a year in profit and accept a industry high PE of 29.
Since they have yet to show any profit, and have been loosing 1/2 billion a year... hmm don't hold out hope for 10.00 soon.
More like 3.50.
So your stated PE of 29 at $5/share roughly doubles the correct PE.
So to hit 10.00 a share, people would have to believe Sun could make 2 billion a year in profit and accept a industry high PE of 29.
Since they have yet to show any profit, and have been loosing 1/2 billion a year... hmm don't hold out hope for 10.00 soon.
More like 3.50.
- Power6 will have quad core
- by Eric Draven December 12, 2006 12:55 AM PST
- Power6, like its direct predecessor Power5+, will have both dual-core and quad-core implementations, contrary to what is stated in the article.
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