October 3, 2006 5:06 PM PDT

IBM plans new high-end Xeon server

IBM has committed to adding a fourth generation to its line of high-end Xeon servers, and the arrival of multicore chips means the system will be a notch smaller than its predecessors.

The company plans to release its X4 chipset when Intel's next generation of high-end Xeon processors arrives in 2007, said Tom Bradicich, chief technology officer of IBM's System x division, which sells x86 servers. The new x86 servers with the X4 chipset will continue with IBM's "expand on demand" strategy, in which smaller server modules can be connected together with high-speed communication cables to form a larger multiprocessor machine.

In 1998, IBM unveiled its X Architecture plan to bring mainframe technology to comparatively ordinary servers that use Intel processors. The plan has borne fruit in the form of three generations of Enterprise X Architecture chipsets, which link the server's processors to each other and to subsystems such as memory and networking.

Last week at the Intel Developer Forum, Susan Whitney, the general manager of IBM's System x division, signed up for another round. "We are going to invest in our fourth-generation Enterprise X Architecture," she said in a stage appearance with Pat Gelsinger, the general manager of Intel's Digital Enterprise Group.

IBM, the top server company in terms of revenue, has been trying to distinguish itself from the x86 server herd by making high-end models with numerous processors. Most x86 server customers gravitate toward two-processor systems, but IBM's current EXA x3950, for example, can accommodate as many as 32 of Intel's current dual-core Xeon processors.

In contrast, x86 server market leader Hewlett-Packard and No. 2 Dell have backed off high-end x86 servers. Sun Microsystems, a late entrant to the market, likes big-iron x86, but uses only Advanced Micro Devices' Opteron processor.

Intel's "Tigerton" Xeon processors, due in 2007, have four processing engines, or cores. That means that IBM's X4-based servers will have only 16 processors rather than today's 32, Bradicich said, because the quad-core chips each can handle twice the number of 64 parallel instruction sequences, called "threads." That, in turn, means lower prices for customers.

"We're definitely going to have a lower-cost solution with the increased core density that we have," Bradicich said.

IBM is still working on the best packaging approach. In the second-generation design, it could fit one or two four-processor motherboards in a 7-inch-thick rack-mountable server chassis. The disadvantage to that more-compact option was that both motherboards had to share the same input-output slots, Bradicich said.

With the X4 systems' chassis arrangements, IBM is experimenting. We haven't decided yet," he said.

The Tigerton processors, as well as their "Dunnington" successors, use Intel's Core processor architecture, which has restored some of the company's competitiveness against rival AMD. But at the same time that IBM introduced Core-based server chips, it also launched a full line of x86 servers using AMD's Opteron.

Why did IBM add Opteron just when Xeon was recovering? "The answer is customer demand rather than the supply side of portfolio analysis," Bradicich said. "There is a strong customer demand for both."

Intel currently is the exclusive tenant of the top-end, multiprocessor reaches of the System x line. But AMD is getting closer.

IBM's AMD systems thus far accommodate up to four dual-core Opterons, upgradeable with the quad-core models scheduled to arrive in mid-2007.

On today's Opteron systems, each processor has a direct connection to three others through the use of the HyperTransport high-speed chip communication technology. That's important for chips synchronizing information stored in their high-speed cache memories or retrieving data stored in main memory attached to a different processor.

Moving from four to eight Opterons means that information is no longer directly accessible but rather one chip-hop away. Performance increases, Bradicich said, but not commensurately with system price, so for now, IBM doesn't think it worthwhile to build eight-Opteron systems.

But AMD also is improving next-generation Opterons so each chip can directly connect to seven other chips. Bradicich was mum about whether that change would lead IBM to release an eight-Opteron design then.

"We understand its value and are weighing the options," he said.

See more CNET content tagged:
Intel Xeon, x86 server, AMD Opteron, IBM Corp., multiprocessor


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Why? XEON is Junk...
When you have to throw 16MB of L3 cache at a processor to get performance out of it in a multi-processor system then it is pretty indicative of an architecture problem. In this case it is Intel's HUB architecture.
Stick to your guns with the MP Opterons until Intel gets their act together.
Posted by fred dunn (793 comments )
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And yet...
the latest iterations of the Sun UltraSparc (IV+) and the PowerPC (5) have 32MB and 36MB of L3 cache respectively; these are chips used in servers with dozens if not hundreds of processors, where Xeons and Opterons need not apply. Apparently you know something the rest of the industry doesn't.
Posted by nottlv (13 comments )
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Performance is Performance
If the chip does the work without excessive heat or cost then who cares how it works?
Posted by Andrew J Glina (1673 comments )
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