Newsmaker: IBM chip architect guns for gigahertz

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What frequency will production Power6 chips use?
McCredie: That's the thing we haven't got down yet. Our actual shipping frequency is going to be set by the system environment we choose to put the chip into. Chip development has to be well ahead of system development. Those system environments will have various power constraints and thermal constraints. As we settle those down we'll be able to pin the ultimate frequency. We're telling people now the ultimate frequency will be between 4GHz and 5GHz.

How do you get up to that speed?
McCredie: That's what Brian Curran (the lead author on IBM's 4GHz paper for ISSCC) showed. If you're holding the pipe depth constant, you have to put half as much logic between each pipe stage. We had to get to the point where our circuits were doing double and triple duty, where one set of transistors were doing multiple functions. We had half as much gate delay between latches but had to get more work out of them.

The chip will come out in 2007. Isn't that later than what IBM had said earlier?
McCredie: We're trying to stay on a three-year cadence.

I imagine you're trying to balance the Power6 systems so that a 4GHz chip won't just idle away more processing cycles waiting for data.
McCredie: We did scale the system with the chip. While we didn't show it at ISSCC, one of the key things is our next-generation I/O (input-output). We also have our third-generation elastic interface, so we are scaling our memory and processor-to-processor communication. We're focusing on scaling our system structure as well so we don't just spin our wheels faster.

Multicore processors are all the rage, and IBM led the market with the dual-core Power4. What does the future hold for Power6?
McCredie: The key thing is the balance between maintaining our single-core performance as well as maintaining our system throughput. There are many applications that still count on that single-core, single-thread, uniprocessor performance. Not all the applications have been migrated over to exploit multiple cores. We're trying to strike the balance between single-thread performance on uniprocessor apps and SMP (symmetrical multiprocessing with many threads). That's one of the reasons we did pursue the frequency.

How many cores does Power6 have?
McCredie: It's still a dual-core chip (like Power5). But we will, as we did on Power5, exploit our chip to get more than two cores per socket, just like we did on Power5.

Your multichip module packaging approach?
McCredie: Exactly. Power5 was the first four-core-per-socket design out there.

Will it still have two threads per core?
McCredie: We haven't talked about that yet.

Sun's UltraSparc T1 "Niagara" processor takes a different balance, emphasizing throughput much more than single-thread performance. What do you think of it?
McCredie: The problem you find is this: When you go over and specialize too much on one aspect of performance, you generally get in trouble. Life is never so kind to us architects. If I do this one thing, like great throughput SMP performance, and ignore all these other things, the world is not kind to you. We usually end up making trade-offs. Every single customer has at least one key app that's never been threaded.

Sun isn't arguing that Niagara is good for everything. They're aiming for the front-end server jobs like Web site hosting or Java programs.
McCredie: I don't believe there's a big role in this world for too-specialized hardware. We have to stay on general-purpose hardware that we can do a lot with. Cray, Thinking Machines--the roadside is littered with people building specialized scientific hardware.

What do you think of asynchronous clocking, where different parts of the chip run on independent schedules?
McCredie: For me, personally, for this particular architect, I'm not a big fan. It breaks too many of our tools and verification suites to build large processors.

Power is a big issue these days. What will power consumption look like going from Power5 to Power6?
McCredie: We're targeting the same classes and categories for Power5 and Power6. We're telling people we're hitting the same power envelope as with the Power5. We are holding the power aligned for the most part. Holding the power is a concern for everybody these days.  

More Newsmakers

4 GHz.. Right....

Just like they promised to have 3 GHz out on the market over a year ago. And that STILL hasn't happened. IBM is losing out big time by messing around and not taking this seriously. The faster the processors, the more work people can get done in an efficient amount of time.

[markusfarkus]

wrong market

This new chip is for their server market, not Apple. Since their market share in this area (as well as the console market) is growing, I think they're taking it very seriously.

[catchall]

They made it

for the XBox360. True, they left Apple out in the cold, but I think that was a business decision on where to apply resources.
This being a part of their core (ie server) market, I think they will hit their marks.

[chrisfrary]

This means nothing

Thats not the point, these processors are for the servers. The I'm not impressed till i see actual benchmarks on various systems.

[Lolo Gecko]

4GHz + 4GW = ...

1 desktop heater, which can also compute :)

It's the Right Target

I've done benchmarks off and on, since the 25 MHZ
era (385 vs 68020 vs 29000 vs SPARC), and my
basic conclusion is that only three things
matter:

-CPU Speed
-Bus Width
-Cache Size (or, more accuratley, the square root
of the cache size)

RISC vs CISC doesn't matter.
External bus speed matters, but not as much as
you'd think.
External bus mode (DDR or SDRAM) matters, but
mainly as a tie-breaker.
2-way versus 4-way versus 8-way cache doesn't
matter very much.
Two-level cache doesn't matter very much.


If IBM can build a 4 GHz processor with 4M
of reasonably good cache, then it will kick
the current generation of x86 processors out of
the server room. The big question is: What will
AMD and Intel come up with in the meantime?

[My-Self]

Did anyone tell IBM ?

Did anyone tell IBM that Apple switched to Intel architecture ?

Where will those PowerPC go ? embedded devices ?

[DavidHalko]

POWER and SPARC Comparisons made were...

Interesting...

> IBM has steadily gained share in the Unix server market against longtime leader Sun Microsystems in recent years...

Until the last quarter, when SUN had gained marketshare against all competitors.

> McCredie: The problem you find is this: When you go over and specialize too much on one aspect of performance, you generally get in trouble.
> McCredie: I don't believe there's a big role in this world for too-specialized hardware.

This was just the opposite message the IBM and POWER were delivering when Apple abandoned POWER ship.

IBM indicated that Apple was looking for a very high performance generic chip and they were more interested in investing in a more specialized infrastructure (around gaming machines.)

I find it ironic that the message is 100% the opposite direction now.

>>Power is a big issue these days. What will power consumption look like going from Power5 to Power6?
>McCredie: We're targeting the same classes and categories for Power5 and Power6. We're telling people we're hitting the same power envelope as with the Power5. We are holding the power aligned for the most part. Holding the power is a concern for everybody these days.

This is the same message that SUN had been evalgelizing with SPARC. They have gone through 3 generations of holding the power enveolope (uSPARC III, uSPARC IV, uSPARC IV+ - except their current processor is 3x the speed in a single thread and 5x the throughput considering multiple threads.

It has been an adventure watching POWER and SPARC go at it over the years:
- POWER coming out with 2 core per socket
- SPARC coming out with 8 core per socket
- POWER reaching out to 4 core per socket

This is the first time in awhile where SUN has been leading in nearly all market segments where vendors have needed to resort to MPP (very specialized software requirements) to beat a SUN manufactured single chassis platform (very easy to implement off-the-shelf software.)

I am looking forward to a reasonable response from proprietary POWER to put more pressure on Open Source architectures like SPARC.