June 9, 2002 9:00 PM PDT

Chip designers voyage to voltage island

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If by chance a group of chip designers were left alone in a room, their conversation would most likely turn to power consumption.

So for such folks, the VLSI Symposia on Technology and Circuits, starting Monday in Hawaii, promises to be a real good time. One of the major topics will be how to reduce the amount of power chips need. Engineers from IBM, Intel and a host of other chipmakers will gather to share ideas on chip design and present approximately 225 papers, many of which will deal with power consumption.

Chips are increasingly running at faster speeds and making use of more transistors. The larger amounts of electricity needed to run these chips, though, is forcing designers to rethink their chips so they consume less electricity and produce less heat. But to make such chips a reality, researchers have to come up with some creative solutions, such as new manufacturing techniques or the use of new materials.

IBM, for its part, will debut a new manufacturing process for creating low-power custom chips at the symposium.

The concept, involving something called "voltage islands," will be used first in IBM's new CU-08 manufacturing process for application specific integrated processors (ASICs). The CU-08 technique, which uses a 90-nanometer manufacturing process along with materials such as copper interconnects, will show up in prototype chips in the third quarter and in commercial products next year.

IBM says the voltage island concept can reduce power consumption substantially by allowing designers to build processors that vary their voltages across a chip. A single system-on-a-chip processor could be built to run one voltage in one area, such as a processor core, and a different voltage in the other chip components. It could also switch off areas that aren't in use, the company said. System-on-a-chip processors are popular for use in consumer electronics because they contain all of the elements to run a device, ranging from a processor core to memory.

The voltage island process will allow the creation of chips that can range from 0.7 volts to 1.2 volts. IBM's current ASIC process produces processors that range from 1.3 volts to 1.8 volts, the company said.

Intel will also present several papers at the VLSI Symposium, outlining ways to increase the clock speed of its PC processors while containing leakage, the amount of power that slips past a transistor when it is turned off.

Among the topics Intel will discuss will be creating lower-power on-chip buses (devices that shuttle data back and forth), low-power clocks and leakless caches (which store data).

But "there is no magic bullet," said Shekhar Borkar, an Intel research fellow. "What you have to do is look at all of these techniques" together.

When combined with Intel's recent advances in transistor design and packaging, Borkar said that the new techniques could create chips that are 20 percent to 30 percent faster or ones that use 30 percent to 50 percent less power. The company will look to put some of these ideas into practice within the next five to seven years, starting with its 65-nanometer manufacturing process.

Chips go marching on
As semiconductor technology marches forward, in accordance with Moore's Law, chips get smaller and faster, but they also pack more transistors.

Doubling the number of transistors yet fitting them into tighter confines, which happens with every manufacturing process generation, exacerbates certain problems, such as current leakage and interference between transistors.

Ultimately, "power consumption will probably become the limiter...because as we put more and more transistors per unit area, if we don't keep the power density flat, we can't use the chip," said Bijan Davari, vice president of semiconductor development at IBM Microelectronics.

Sure, chips could still be manufactured, Davari said, but they would be use too much power to be practical for use in home PCs or cellular phones.

To hold power down, "you need to fundamentally change some of the things the industry has been using for 30 years to keep the performance increase going," Davari said. Fortunately, "the way to do it is exactly the same solution that we use for high performance."

That means developing new materials, such as silicon on insulator, that hold down power consumption or make chips run faster by making transistors more efficient.

But just because reducing power is possible, doesn't mean it's easy, said Fred Zieber, president of research firm Pathfinder Research.

Power "is going to be a hot topic as far as you can see," Zieber said. "As you get to higher and higher densities and more and more transistors and gates on a chip, power is becoming really important. It's something that's across the board, not just portables."

The voltage island concept, "is a very nice addition to IBM's (90 nanometer) process and something I think you'll see increasingly as people go to that dimension," Zieber said. "As you move to (90 nanometers) and below, there's a lot of stuff that the industry hasn't had to address before. That's why these guys are working on it" at the conference.

 

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