May 16, 2006 10:00 AM PDT
AMD unveils architecture for its next generation of chips
The new chip architecture--currently dubbed the Next Generation Processor Technology--enhances the design underlying the current Opteron, Turion and Athlon 64 chips. Performance will increase and AMD will keep a lid on power consumption, but the company has veered away from making radical conceptual changes in the overall blueprint. Processors built under the new design will come out in 2007.
"Rather than focus on coming out with a new core every other year, we're focusing on the big picture" of overall system performance, said Chuck Moore, a senior fellow at AMD.
Intel, by contrast, is overhauling the basic architecture of its chips in the second half of 2006 and will follow with more incremental design changes in subsequent years. The company asserts that processors based on the architecture--Merom, Conroe and Woodcrest, will substantially outdo contemporary AMD chips by 20 percent and reduce power consumption.
While Moore didn't make a point-for-point comparison with Intel's future chips, he asserted that right now AMD is beating the company he called AMD's nearest competitor.
"When you compare the performance and power consumption, there is an enormous difference," he said.
Which company comes out with the superior chip architecture over the next 18 months will be one of the big issues in the PC market in 2007 and will ultimately depend on a host of factors.
Chips built under the new AMD architecture will feature a faster version of HyperTransport, an input-output technology featured on AMD chips. HyperTransport 3.0, recently approved by the standards body that governs the development of the technology, will accomplish 5.2 gigatransfers (5.2 billion transfers of data) per second, Moore said. Although it doesn't get as much attention as 64-bit processing, HyperTransport is behind much of the performance gains of AMD chips in recent years.
The new chips will also sport four processing cores. AMD's best chips currently come with two processing cores.
One of the biggest changes will come in the caches, reservoirs of memory built into the processor for rapid data access. In current AMD chips, each core has two caches and those caches are completely dedicated to their respective cores. In future chips, each core will also have two dedicated caches, but the cores will also share a third cache. With the third cache, the processor will less often have to fetch data from main memory--a time-consuming process.
Intel chips typically have larger caches. Intel, however, does not integrate a memory controller onto its chips like AMD does. This also cuts down memory latency. Whether it's better to have a larger cache and a separate memory controller or a smaller cache with an integrated memory controller is the source of an ongoing debate between the two companies.
The upcoming AMD chips will also curb power consumption by allowing the memory controller or the processor core to independently power down during idle periods, Moore said. The memory controller and processing cores currently slow down during slow periods, but only when both are relatively idle.
The integrated memory controller on the new chips will also connect to DDR2 memory and accommodate DDR3, a memory specification under construction, at the appropriate time, Moore added. Intel will match its future server chips with another memory standard, called FB-DIMM. Again, which of these is better is under debate between the two companies. AMD says that FB-DIMM produces more heat.
An Intel representative said the amount of extra energy is minimal, adding that AMD won't support FB-DIMM faster than standard DDR memory because of the integrated memory controller.
Moore outlined AMD's plans at the Spring Processor Forum in San Jose, Calif.
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