Intel released a few incremental details about its future graphics chip on Monday, but left a lot of unanswered questions about the company's push into uncharted waters.
Larrabee, a "many-core" graphics processor scheduled for 2009 or 2010, will come with a brand-new set of vector-processing instructions as part of its design, said Pat Gelsinger, senior vice president and co-general manager of Intel's digital enterprise group. Vector-processing instructions are used to improve the performance of graphics and video applications; you may have heard of previous vector-processing implementations such as SSE4.
These new instructions, combined with Larrabee's compatibility with the x86 instruction set, will make life easier for software developers, according to Gelsinger. In addition to regular graphics tasks currently dominated by Nvidia and Advanced Micro Devices, Intel wants Larrabee to be able to take on a wider variety of tasks.
This is an emerging area of PC chip development--designing PC chips that use the best parts of graphics chips to improve performance. It's referred to by several names, with perhaps the most common label "GPGPU," or general-purpose graphics processing unit.
High-performance graphics chips are generally designed to do one thing, and do it fast. They aren't designed to handle the wide variety of workloads that PC chips tackle every day. As it becomes possible to add more and more cores to an individual chip, however, Intel, AMD, and Nvidia are investigating ways to build developer-friendly versions of graphics chips that can take on wider varieties of workloads.
The trouble is that "developer-friendly" line. Some of the current approaches for GPGPUs involve learning specialized programming techniques that are applicable just to that chip, and many of those are still very, very new compared with the 30-plus years of experience that people have had developing for the x86 instruction set.
"Attempts to create new programmable architectures are painful heavy-lifting over time, and for the most part they fail," said Gelsinger. And he should know: Intel's last attempt to create a new programmable architecture with the Itanium processor's EPIC instruction set hasn't come close to what Intel had once hoped to accomplish. Itanium hasn't been an abject failure, since people are buying the chips and development continues, but it's quite clear that Itanium is not, and will not be, the future of computing.
So this is Intel's pitch: it wants to get in on the graphics/multimedia game, since PC workloads are expected to head more and more in that direction. But it wants Larrabee to be like the release of a new Core 2 Duo processor: you'll have to learn how to use the new vector instructions to unlock the new performance, in the same manner you'd have to learn the new SSE4 instructions introduced last year with the Penryn chips, but you won't have to otherwise reinvent the wheel. Larrabee will also support familiar APIs (application programming interfaces) like DirectX and OpenGL, Gelsinger confirmed.
All told, we still don't know a hell of a lot about Larrabee. Gelsinger claims that big software development houses are excited about what they've seen so far from the project, but he did not offer any specific examples. The water-cooler conversation after his talk suggested that PC gaming companies will like this idea of a high-performance "many-core" (think more than eight) processor that's easier to program than IBM's Cell processor inside the PlayStation 3, for example.
But software developers have only heard of Larrabee as a concept; they haven't actually played with it yet. Intel hopes to have demonstration chips out later this year, with an actual launch not scheduled until either 2009 or 2010. We won't know just how easy programming for Larrabee will be until those demonstration chips are released.
Along a similar vector (nothing better than CPU puns), Intel disclosed that its "Sandy Bridge" processor, which is going to be a 2010 product, will also use a set of vector-processing instructions that the company is calling AVX. Gelsinger called AVX "SSE on steroids," suggesting that chip will take a big leap forward in graphics/multimedia performance.
Gelsinger spent the remainder of his address talking up Nehalem, which is due to arrive this year. Nehalem is going to be a hodge-podge of chips, with two, four, and eight core models scheduled to be in production later this year. They'll also use integrated memory controllers and point-to-point interconnects for speeding up the connections to memory and to other cores, respectively. Those were ideas brought into the mainstream by AMD years ago, and they should provide a significant boost to Intel's chip line, since the company was doing pretty well without them.