SAN FRANCISCO--This Nehalem plan better work out for Intel, because the chipmaker set very high expectations for the next-generation processor design Tuesday.
Pat Gelsinger, general manager of Intel's Digital Enterprise Group, demonstrated a Nehalem-based system at the Intel Developer Forum here that he said will bring major performance improvements for the company's x86 processor line. The processor family itself is due to arrive in 2008.
The Nehalem demonstration featured a system with two quad-core processors; each processing core can handle two independent instruction sequences called threads, and the demo showed all 16 threads at work on various tasks. The processor was the very first incarnation of Nehalem--the "A0" version--built for the first time three weeks ago, Gelsinger said.
"What you saw today was incredible health," he boasted during a meeting with reporters after the speech. "It really is pretty spectacular, and we're excited by the progress."
Nehalem brings major changes not just to the processor but also to the way in which it communicates with memory and other processors, a technology formerly called CSI, which variously stood for Common System Interconnect or Interface, and now branded as QuickPath Interconnect, or QPI. QuickPath reproduces a technique that rival Advanced Micro Devices used for years to market share against Intel and secure a solid position in all four major server makers' product lines.
The Nehalem processors demonstrated Tuesday each had four cores on a single slice of silicon, the approach AMD uses with its new Barcelona member of the Opteron processor family. In 2009, Intel will sell Nehalem processors with eight cores on a single slice of silicon.
Intel also is expected to sell less expensive Nehalem processors with dual cores per die, a source familiar with the company's plans said. … Read more