Chipsets

Explaining Intel's Turbo Boost technology

Intel promotes the Turbo Boost technology in its new Core i7 Mobile processors as a way to adapt to the needs of the software and get more performance from the chip, but this isn't the real reason the technology exists.

The new "Clarksfield" Core i7 Mobile processors introduced at the Intel Developer Forum last week are certainly very impressive. They're huge high-performance quad-core chips with Hyper-Threading, support for two channels of DDR3-1333 DRAM, and an on-die PCI Express controller for the fastest possible connection to discrete graphics chips.

In his IDF session announcing these parts, Intel Vice President Mooly Eden said the best of these parts, the 2GHz Core i7-920XM Extreme Edition, is "the fastest quad-core processor, the fastest dual-core processor, and the fastest single-core processor"-- all in one chip.

The key to this dramatic claim is a feature called Turbo Boost technology. Basically, if the current application workload isn't keeping all four cores fully busy and pushing right up against the chip's TDP (Thermal Design Power) limit, Turbo Boost can increase the clock speed of each core individually to get more performance out of the chip.

It's easy to see how this works when just one or two cores are being actively used; whatever power the other two or three cores would have consumed can be redirected over to the active cores, allowing them to run at higher speeds.

The quad-core mode of Turbo Boost is a little more subtle; it works when the four cores aren't running a worst-case workload--for example, integer-heavy processing, since it's generally floating-point calculations that consume the most power--so they aren't bumping into the TDP limit. Turbo Boost can increase the frequency of all four cores until they're running as fast as they can for the current workload.

Eden said that the Turbo Boost controller… Read more

Intel's Lynnfield mysteries solved

The mysteries of the Lynnfield and Jasper Forest die photos (from last week's post titled "Investigating Intel's Lynnfield mysteries") were all cleared up at the Intel Developer Forum last week, and as expected, there was nothing sinister going on--just some confusion in Intel's graphics arts department.

With the help of the always-helpful George Alfs of Intel's press relations department and Intel vice president Mooly Eden (general manager of Intel's PC Client Group), we got everything straightened out. Literally!

Here's the die photo of Intel's Lynnfield chip from my previous post:

This is the newest (shipping) part based on the Nehalem microarchitecture, differing from the earlier Bloomfield by the addition of an on-die PCI Express controller. Both chips are made in Intel's 45nm process technology.

According to Eden, the Lynnfield chip design is shared with several other Intel chips that will be on the market soon, including… Read more

Investigating Intel's Lynnfield mysteries

I have a few questions to ask at this week's Intel Developer Forum....

Why is Intel using a more expensive chip for the new Core i5 and cheaper Core i7 processors? Why does this new chip--code-named Lynnfield--appear to have features Intel isn't using? What's the connection between Lynnfield and a future Intel chip code-named Jasper Forest?

These questions arose as I've been getting ready for IDF by reviewing recent press releases and news stories about Intel's current and forthcoming products, and chatting with fellow analysts about what we're looking forward to seeing there.

The recent announcements of the Core i5 and new Core i7 processors seemed pretty straightforward. Consider Brooke Crothers' piece on CNET: "Out with the old: Intel makes Core 'i' chips cheap." As Crothers explains, the facts are simple: the new Core i7 800-series slots in under the existing 900-series and replaces some older parts. The Core i5 is a new line, clearly positioned below the Core i7. Features, performance, and prices are all lower. That's as it should be.

But in looking at the coverage on some enthusiast sites, a fact jumped out at me. The Lynnfield chip is 12.5 percent larger than the Bloomfield chip used in the higher-priced Core i7 900-series processors (296 square mm vs. 263 square mm), in spite of the fact that Lynnfield only has two memory interfaces and no QuickPath Interconnect (QPI) link.

The big difference between the chips is the addition of 16 lanes of PCI Express on Lynnfield, but that's only about 80 pins plus the control logic. The changes should have roughly canceled each other out. Maybe one chip would be a little bigger than the other, but not by this much.… Read more

Intel forum debuts to include USB 3.0 gear

As the next generation of Universal Serial Bus technology nears commercial reality, next week's Intel Developer Forum will play host to more USB 3.0-capable devices.

A Fujitsu laptop, a high-end video camera, and a solid-state drive using USB 3.0 technology, among other hardware, will be demonstrated at IDF, according an announcement from the USB Implementers Forum on Thursday.

USB technology is now used on virtually all computing devices globally as well as the lion's share of consumer electronics products. Also referred to as "SuperSpeed USB," next-generation USB 3.0 boosts the data transfer rate … Read more

Intel Forum preview: Moore's Law expressed as fewer chips

Intel is expressing Moore's Law anew as packing key technologies into fewer chips. New "Clarksfield," "Arrandale" and "Jasper Forest" processors, among others, will showcase this theme later this month at the Intel Developer Forum.

Intel Vice President Steve Smith discussed the highlights of the annual marquee Intel event that will kick off September 22 in San Francisco in a phone interview on Friday.

"Contrary to speculation that Moore's Law is slowing down or potentially dying, we're here to demonstrate that it's alive and well," Smith said. "Integration gives you a smaller, better, faster, more mobile compute platform," he said. Moore's Law, named after Intel co-founder Gordon Moore, states that the number of transistors that can be placed on an integrated circuit doubles roughly every two years.

This theme will be manifested in a number of new processors including the first mobile processor based on Intel's new Nehalem microarchitecture codenamed Clarksfield and even more highly integrated processors to follow dubbed Arrandale and Clarkdale as Intel moves to its next-generation 32-nanometer manufacturing process.

True to its rich heritage of codenames, IDF can, at times, slide into little more than a series of codename-riddled Power Point slides, with some names sounding frustratingly familiar such as Clarksfield and Clarkdale. But codenames, for better or worse, are part and parcel of IDF.

Intel codename decoder:

Clarksfield: 45-nanometer Nehalem mobile processor integrating I/O Clarkdale: 32-nanometer Nehalem desktop chip integrating graphics with CPU Arrandale: 32-nanometer Nehalem mobile chip integrating graphics with CPU Moorestown: 32-nanometer system-on-chip Atom for smartphones Sodaville: 32-nanometer system-on-chip Atom for consumer Pine Trail: new Atom for Netbooks integrating graphics with CPU Jasper Forest: 45-nanometer, first Nehalem embedded chip for uses such as storage hardware Larrabee: Intel discrete graphics chip that will compete with Nvidia, AMD Westmere: 32-nanometer manufacturing process technology

Smith said that Intel's move to the next-generation "Westmere" 32-nanometer manufacturing process will drive even more integration next year. "We have completed development and certification of the 32-nanometer process, which means our factory is fully qualified to run the wafers. And we are actually running Westmere CPU wafers through the factory in support of our Q4 revenue production. Absolutely on track for that Q4 revenue production," he said, referring to commercial production of 32-nanometer processors.

In the more immediate future, Intel will roll out a new mobile processor based on its current 45-nanometer technology. "We just announced Lynnfield (the Core i5 and i7 chips for desktops), Clarksfield is the equivalent product for notebooks," Smith said. "Quad-core, 45-nanometer. Based on Nehalem technology but optimized with power management and integration of the PCI express I/O. Moving from a three-chip solution in the original Nehalem products to two chips--and that is our path going forward." I/O, or input-output, is silicon that enables a processor to talk, and shuttle data, to other parts of the system and peripheral components.

Speaking more specifically about Clarksfield integration, Smith said that "the key elements are integration of memory controller, integration of PCI Express 'gen' 2, power management." Intel will also be talking a lot about a feature called Turbo mode. "Turbo mode is extremely important. If you're not using all the cores, the cores that are not used are powered down. The cores that you are using can run at a faster clock rate with Turbo mode," Smith said.

Smith spoke about the next-generation Atom processor for Netbooks and Nettops, "Pine Trail," too. This chip will also… Read more

Intel's 'Braidwood'--Turbo Memory done right?

Much has been made lately about the trend toward solid-state drives. Now a new Intel technology, code-named Braidwood, may delay that trend, blending the performance of solid-state drives with the economy of old-style hard drives.

Braidwood--like its predecessor, Intel's Turbo Memory technology (formerly code-named Robson)--is basically a solid-state cache for all the disks in the system.

I heard about Braidwood earlier this summer on CNET (see "Intel 'Braidwood' chip targets snappier software" by Brooke Crothers). But I shrugged it off, assuming it would be no better than Turbo Memory, which left a bad taste in the mouth of many PC makers, end users, and Microsoft execs. Turbo Memory (and Turbo Memory 2.0) wasn't cheap, and it definitely wasn't worth the cost. The PC industry operates on such slim margins that every dollar's worth of hardware has to earn its keep--and Robson didn't.

But then I read an EE Times article this week by Mark LePedus describing a new report from Jim Handy of analyst firm Objective Analysis.

The 62-page report is titled "Intel's Braidwood: Death to SSDs?"

Handy's report argues persuasively that Braidwood might actually be worthwhile, and that got my attention. I've known him a long time, and he's a very good analyst--he's been covering memory and caching technology a lot longer than I have. He wrote one of the standard references for computer system architects, "The Cache Memory Book."

So I sent Handy a note, and he sent me a copy of the report. And now that I've read it, I'm inclined to agree with his conclusions, assuming the information he's obtained about Braidwood is accurate. It does seem reasonable, at least.

The first thing to understand is why flash memory can be a good disk cache. This boils down to its much faster access times: microseconds, not milliseconds. Flash can actually take much longer to write than a hard disk. But for reads, it's really quick. So if you can be smart about putting the right hard-disk data in the cache, especially by choosing the right time to do those write operations, you can save huge amounts of time on future disk reads.

Intel, Microsoft event to highlight Windows 7 improvements

Intel and Microsoft will hold an event next week to discuss collaboration on improvements to Windows 7.

The event, on September 1 in San Francisco, will "share how the two companies collaborated on key enhancements during the development of Windows 7," according to Intel. Steve Smith, vice president and director, Intel's Digital Enterprise Group Operations, and Michael Angiulo, general manager of Windows Planning and PC Ecosystem at Microsoft, will talk at the event. Microsoft plans to launch Windows 7 on October 22.

Windows 7 collaboration will be demonstrated by engineers from both companies, according to Intel. Not … Read more

Report: Nvidia readies Intel-disputed chip

Nvidia is readying silicon that would work with Intel's newest processor design, according to a report. Intel claims Nvidia does not have the legal rights to make companion chips for its newest processors.

In February, Intel alleged in a lawsuit that the 4-year-old chipset license agreement with Nvidia does not extend to Intel's future-generation processors with "integrated" memory controllers, such as its "Nehalem" Core i series of processors.

A chipset is companion silicon to the main processor. Integrated memory controllers are built into the processor itself to increase performance between the processor and memory. … Read more

Intel says new Atom chip not delayed

The general manager of Intel's mobile group said the chipmaker's next-generation Netbook technology is not delayed, refuting earlier reports.

Reports surfaced this week that Intel's next-generation "Pine Trail" Atom silicon would be delayed. Speaking at the Intel Technology Summit on Wednesday in San Francisco, Mooly Eden, general manager of the Mobile Platforms Group at Intel, said the Netbook silicon is not delayed.

"Pine Trail is on schedule," Eden said.

Eden described Pine Trail as the "next generation of Atom that we are going to put into Netbooks." Pine Trail will integrate … Read more

Intel, Nokia announce mobile pact

Updated at 8:20 a.m. PDT: Added Intel-Nokia announcement and Intel discussion.

Intel and Nokia announced on Tuesday a wide-ranging deal covering chips, hardware, and software for mobile devices.

The companies said their new "long-term relationship" will focus on developing new chip architectures and software and a new class of Intel-based mobile computing devices. The move is part of a major shift for Intel, which is a giant in PC chips but not a player in cell phones.

Among other aspects, the agreement covers mobile applications and wireless Internet access "in a user-friendly pocketable form factor.&… Read more