February 2, 2006 11:40 AM PST
The images here show how tuning the voltage of the three gates controls very small amounts of electrical charge and regulates current flow in the new silicon transistor.
In the first figure, the pattern of diagonal lines indicates the charge is correlated throughout the device and current is flowing at levels ranging from 0 amps, shown in red, to 1.4 nanoamps, shown in violet. The next three figures show what happens as the voltage applied to the center gate is reduced. In the last figure, the square pattern indicates the charge has separated in the device, and the large amount of white space indicates a related drop-off in current.
Photo by NTT/NIST
