Nano layers

HP Labs has come up with a system to boost performance and power efficiency of processors using an overhead grid of tiny nanowires for chip communications.

This diagram shows how the crossbar network of wires is structured. Two layers of perpendicular crossbars form a sandwich on top of a layer of silicon transistors. The transistors and functional blocks inside the chip communicate through dynamic connections created in the crossbars.

By contrast, the transistors in current processors are connected through hardwired connections inside the chips, which takes up a lot of room.

January 15, 2007 9:00 PM PST

Photo by: Hewlett-Packard