Newsmaker: IBM chip architect guns for gigahertz

The gigahertz race is back on, and IBM's Brad McCredie is lacing up his shoes.

Chipmakers have found it harder to kick up a processor's clock speed while actually getting more useful work out of a chip and avoiding inordinate electricity consumption. As a result, Intel, Sun Microsystems and Advanced Micro Devices have begun emphasizing other features--for example, squeezing multiple processing engines, called cores, onto a single slice of silicon or executing many instruction sequences, called threads, simultaneously.

A correction was made to this story. Read below for details.

But IBM announced last week at the International Solid State Circuits Convention that its forthcoming Power6 processor will run at least at 4GHz--the same speed Intel tried and failed to reach with Pentium in 2004.

McCredie, Power6's chief architect, joined IBM's mainframe group in 1991 but later moved to its Austin, Texas, team to work on the Power processors at the heart of the company's Unix servers. IBM has steadily gained share in the Unix server market against longtime leader Sun Microsystems in recent years, and much of the future success of that competitive attack lies with McCredie.

A 4GHz minimum puts IBM ahead of the pack, but Big Blue has hit some hurdles elsewhere in the race. In 2004, IBM said Power6 would arrive in 2006, with a faster variant called Power6+ scheduled for 2007, but McCredie said Power6 now is scheduled to emerge in 2007.

McCredie spoke with CNET News.com's Stephen Shankland about papers he co-authored for the chip conference.

The problem you find is this: When you go over and specialize too much on one aspect of performance, you generally get in trouble. Life is never so kind to us architects.

Q: What was the big news at the conference for IBM?
McCredie: The main thing we did here is reveal the Power6 system design. We're still a year away from general availability, but the message we're trying to put out is we're still on schedule and continuing our pace. We released Power4 in 2001, Power5 in 2004, and we're on track for 2007 for Power6. We were showing pass-two (second-generation prototype) hardware results in all our papers with performance numbers. We're hitting some high-frequency targets.

Many of your rivals say they're moving on from the clock speed race.
McCredie: The high frequency is a real strong message out there. Other people may be shying away from high frequency, but we're still focusing on that. We didn't go to extremely power-hungry circuits or slicing the pipeline into 20, 30 or 40 stages, which implies you got the frequency by sacrificing performance.

A deeper pipeline divides up processing into many different steps so several instructions can be processed at the same time.
McCredie: The pipeline is the measure of the delay from the point where instruction is launched to point where an application or user has access to the results. (Having a deeper pipeline) is like having several sinks to wash the dishes--one for washing, a first rinse, a second rinse...If you hit the high frequency by really lengthening the pipe, you increase how long it takes for an instruction to get through the computation. If you double your frequency and double your pipe depth, you don't deliver a lot more performance. We doubled the frequency but held the pipe depth the same as Power5.

Power6 is built with a more advanced manufacturing process employing 65-nanometer features compared to the 90-nanometer process of Power5+. (A nanometer is a billionth of a meter; smaller circuitry means chips can be made smaller and more cheaply.) How is the 65-nanometer process working out?
McCredie: Right now we're very pleased with 65 nanometers. It's coming along nicely, as you can see from the frequency number. On one paper we showed the maximum frequency reached 5.1GHz. We got a little better than 2x the performance, which shows the 65-nanometer process is performing better than our 90 nanometer.

 

Correction: This story gave an incorrect first name for McCredie. His first name is Brad.

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4 GHz.. Right....

Just like they promised to have 3 GHz out on the market over a year ago. And that STILL hasn't happened. IBM is losing out big time by messing around and not taking this seriously. The faster the processors, the more work people can get done in an efficient amount of time.

[markusfarkus]

wrong market

This new chip is for their server market, not Apple. Since their market share in this area (as well as the console market) is growing, I think they're taking it very seriously.

[catchall]

They made it

for the XBox360. True, they left Apple out in the cold, but I think that was a business decision on where to apply resources.
This being a part of their core (ie server) market, I think they will hit their marks.

[chrisfrary]

This means nothing

Thats not the point, these processors are for the servers. The I'm not impressed till i see actual benchmarks on various systems.

[Lolo Gecko]

4GHz + 4GW = ...

1 desktop heater, which can also compute :)

It's the Right Target

I've done benchmarks off and on, since the 25 MHZ
era (385 vs 68020 vs 29000 vs SPARC), and my
basic conclusion is that only three things
matter:

-CPU Speed
-Bus Width
-Cache Size (or, more accuratley, the square root
of the cache size)

RISC vs CISC doesn't matter.
External bus speed matters, but not as much as
you'd think.
External bus mode (DDR or SDRAM) matters, but
mainly as a tie-breaker.
2-way versus 4-way versus 8-way cache doesn't
matter very much.
Two-level cache doesn't matter very much.


If IBM can build a 4 GHz processor with 4M
of reasonably good cache, then it will kick
the current generation of x86 processors out of
the server room. The big question is: What will
AMD and Intel come up with in the meantime?

[My-Self]

Did anyone tell IBM ?

Did anyone tell IBM that Apple switched to Intel architecture ?

Where will those PowerPC go ? embedded devices ?

[DavidHalko]

POWER and SPARC Comparisons made were...

Interesting...

> IBM has steadily gained share in the Unix server market against longtime leader Sun Microsystems in recent years...

Until the last quarter, when SUN had gained marketshare against all competitors.

> McCredie: The problem you find is this: When you go over and specialize too much on one aspect of performance, you generally get in trouble.
> McCredie: I don't believe there's a big role in this world for too-specialized hardware.

This was just the opposite message the IBM and POWER were delivering when Apple abandoned POWER ship.

IBM indicated that Apple was looking for a very high performance generic chip and they were more interested in investing in a more specialized infrastructure (around gaming machines.)

I find it ironic that the message is 100% the opposite direction now.

>>Power is a big issue these days. What will power consumption look like going from Power5 to Power6?
>McCredie: We're targeting the same classes and categories for Power5 and Power6. We're telling people we're hitting the same power envelope as with the Power5. We are holding the power aligned for the most part. Holding the power is a concern for everybody these days.

This is the same message that SUN had been evalgelizing with SPARC. They have gone through 3 generations of holding the power enveolope (uSPARC III, uSPARC IV, uSPARC IV+ - except their current processor is 3x the speed in a single thread and 5x the throughput considering multiple threads.

It has been an adventure watching POWER and SPARC go at it over the years:
- POWER coming out with 2 core per socket
- SPARC coming out with 8 core per socket
- POWER reaching out to 4 core per socket

This is the first time in awhile where SUN has been leading in nearly all market segments where vendors have needed to resort to MPP (very specialized software requirements) to beat a SUN manufactured single chassis platform (very easy to implement off-the-shelf software.)

I am looking forward to a reasonable response from proprietary POWER to put more pressure on Open Source architectures like SPARC.